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7132LA35FGB8 Datasheet(PDF) 2 Page - Integrated Device Technology |
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7132LA35FGB8 Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 16 page 2 IDT7132SA/LA and IDT 7142SA/LA High Speed 2K x 8 Dual Port Static RAM Military, Industrial and Commercial Temperature Ranges Pin Configurations(1,2,3) NOTES: 1. All VCC pins must be connected to the power supply. 2. All GND pins must be connected to the ground supply. 3. P48-1 package body is approximately .55 in x 2.43 in x .18 in. C48-2 package body is approximately .62 in x 2.43 in x .15 in. L48-1 package body is approximately .57 in x .57 in x .68 in. F48-1 package body is approximately .75 in x .75 in x .11 in. 4. This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking. Description TheIDT7132/IDT7142arehigh-speed2Kx8Dual-PortStaticRAMs. TheIDT7132isdesignedtobeusedasastand-alone8-bitDual-PortRAM or as a “MASTER” Dual-Port RAM together with the IDT7142 “SLAVE” Dual-Portin16-bit-or-morewordwidthsystems.UsingtheIDTMASTER/ SLAVE Dual-Port RAM approach in 16-or-more-bit memory system applicationsresultsinfull-speed,error-freeoperationwithouttheneedfor additionaldiscretelogic. Both devices provide two independent ports with separate control, address,andl/Opinsthatpermitindependent,asynchronousaccessfor reads or writes to any location in memory. An automatic power down feature,controlledbyCEpermitstheon-chipcircuitryofeachporttoenter a very low standby power mode. Fabricated using CMOS high-performance technology, these devices typically operate on only 325mW of power. Low-power (LA) versions offer battery backup data retention capability, with each Dual- Port typically consuming 200µW from a 2V battery. The IDT7132/7142 devices are packaged in a 48-pin sidebraze or plastic DIPs, 48-pin LCCs, 52-pin PLCCs, and 48-lead flatpacks. Military grade product is manufactured in compliance with the latest revision of MIL-PRF-38535 QML, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. Capacitance(1) (TA = +25°C,f = 1.0MHz) NOTES: 1. This parameter is determined by device characterization but is not production tested. 2. 3dV represents the interpolated capacitance when the input and output signals switch from 3V to 0V. Symbol Parameter Conditions(2) Max. Unit CIN Input Capacitance VIN = 3dV 11 pF COUT Output Capacitance VOUT = 3dV 11 pF 2692 tbl 00 |
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