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71342LA25PFG Datasheet(PDF) 5 Page - Integrated Device Technology |
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71342LA25PFG Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 14 page 6.42 IDT71342SA/LA High-Speed 4K x 8 Dual-Port Static RAM with Semaphore Industrial and Commercial Temperature Ranges 5 Data Retention Characteristics (LA Version Only) VLC = 0.2V, VHC = VCC - 0.2V Data Rention Waveform AC Test Conditions Figure 2. Output Test Load (for tLZ, tHZ, tWZ, tOW) *Including scope and jig Figure 1. AC Output Test Load NOTES: 1. VCC = 2V, TA = +25°C, and are not production tested. 2. tRC = Read Cycle Time. 3. This parameter is guaranteed by device characterization, but is not production tested. Symbol Parameter Test Condition Min. Typ.(1) Max. Unit VDR VCC for Data Retention ___ 2.0 ___ V ICCDR Data Retention Current VCC = 2V, CE > VHC COM'L. & IND. ___ 100 1500 µA tCDR(3) Chip Deselect to Data Retention Time SEM > VHC VIN > VHC or < VLC 0 ___ ___ ns tR(3) Operation Recovery Time tRC(2) ___ ___ ns 2721 tbl 07 Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load GND to 3.0V 5ns 1.5V 1.5V Figures 1 and 2 2721 tbl 08 VCC CE DATA RETENTION MODE 4.5V 4.5V VDR > 2V VDR VIH VIH tCDR tR 2721 drw 04 +5V 1250 Ω 30pF 775 Ω DATAOUT 2721 drw 05 , +5V 1250 Ω 5pF * 775 Ω DATAOUT 2721 drw 06 , |
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