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71342SA70PFG8 Datasheet(PDF) 2 Page - Integrated Device Technology |
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71342SA70PFG8 Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 14 page 6.42 IDT71342SA/LA High-Speed 4K x 8 Dual-Port Static RAM with Semaphore Industrial and Commercial Temperature Ranges 2 2721 drw 02 IDT71342J J52-1(4) 52-Pin PLCC Top View(5) INDEX OER A0R A1R A2R A3R A4R A5R A6R A7R A8R A9R N/C I/O7R 46 45 44 43 42 41 40 39 38 37 36 35 34 I/O3L A1L A2L A3L A4L A5L A6L A7L A8L A9L I/O0L I/O1L I/O2L 8 9 10 11 12 13 14 15 16 17 18 19 20 47 48 49 50 51 52 1 2 3 4 5 6 7 33 32 31 30 29 28 27 26 25 24 23 22 21 NOTES: 1. All Vcc pins must be connected to power supply. 2. All GND pins must be connected to ground supply. 3. J52 package body is approximately .79 in x .79 in x .17 in. PN64 package body is approximately 14mm x 14mm x 1.4mm. 4. This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking. Pin Configurations(1,2,3) INDEX 71342PF PN64-1(4) 64-Pin TQFP Top View(5) 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 46 45 44 43 42 41 40 39 38 37 36 35 34 47 48 33 I/O6R N/C A0R A1R A2R A3R A4R A5R A6R A7R A8R A9R I/O7R OER N/C N/C I/O2L A0L OEL A1L A2L A3L A4L A5L A6L A7L A8L A9L I/O0L I/O1L N/C N/C 2721 drw 03 Description The IDT71342 is a high-speed 4K x 8 Dual-Port Static RAM with full on-chip hardware support of semaphore signalling between the two ports. The IDT71342 provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. To assist in arbitrating between ports, a fully independent semaphore logic block is provided. This block contains unassigned flags which can be accessedbyeitherside;however,onlyonesidecancontroltheflagatany time. An automatic power down feature, controlled by CE and SEM, permitstheon-chipcircuitryofeachporttoenteraverylowstandbypower mode (both CE and SEM HIGH). Fabricated using CMOS high-performance technology, this device typically operates on only 700mW of power. Low-power (LA) versions offer battery backup data retention capability, with each port typically consuming200µWfroma2Vbattery.Thedeviceispackagedineithera 64-pin TQFP or a 52-pin PLCC. |
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