6.42

IDT71321SA/LA and IDT71421SA/LA

High Speed 2K x 8 Dual-Port Static RAM with Interrupts

Industrial and Commercial Temperature Ranges

7

NOTES:

1. Transition is measured 0mV from Low or High-impedance voltage Output Test Load (Figure 2).

2. 'X' in part numbers indicates power rating (SA or LA).

3. This parameter is guaranteed by device characterization, but is not production tested.

AC Electrical Characteristics Over the

71321X20

71421X20

Com'l Only

71321X25

71421X25

Com'l

& Ind

Unit

Symbol

Parameter

Min.

Max.

Min.

Max.

READ CYCLE

Read Cycle Time

20

____

25

____

ns

Address Access Time

____

20

____

25

ns

Chip Enable Access Time

____

20

____

25

ns

Output Enable Access Time

____

11

____

12

ns

Output Hold from Address Change

3

____

3

____

ns

Output Low-Z Time

(1,3)

0

____

0

____

ns

____

10

____

10

ns

0

____

0

____

ns

____

20

____

25

ns

2691 tbl 08a

71321X35

71421X35

Com'l Only

71321X55

71421X55

Com'l

& Ind

Unit

Symbol

Parameter

Min.

Max.

Min.

Max.

READ CYCLE

Read Cycle Time

35

____

55

____

ns

Address Access Time

____

35

____

55

ns

Chip Enable Access Time

____

35

____

55

ns

Output Enable Access Time

____

20

____

25

ns

Output Hold from Address Change

3

____

3

____

ns

Output Low-Z Time

(1,3)

0

____

5

____

ns

Output High-Z Time

(1,3)

____

15

____

25

ns

0

____

0

____

ns

Chip Disable to Power Down Time

(3)

____

35

____

50

ns

2691 tbl 08b