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7054L25PRFGI8 Datasheet(PDF) 9 Page - Integrated Device Technology |
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7054L25PRFGI8 Datasheet(HTML) 9 Page - Integrated Device Technology |
9 / 11 page 6.42 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Industrial and Commercial Temperature Ranges 9 Timing Waveform of Write with Port-to-Port Read(1, 2) Functional Description TheIDT7054providesfourportswithseparatecontrol,address,and I/Opinsthatpermitindependentaccessforreadsorwritestoanylocation in memory. These devices have an automatic power down feature controlled by CE. The CE controls on-chip power down circuitry thatpermitstherespectiveporttogointostandbymodewhennotselected (CE = VIH). When a port is enabled, access to the entire memory array ispermitted.EachporthasitsownOutputEnablecontrol(OE).Intheread mode, the port’s OE turns on the output drivers when set LOW. READ/ WRITEconditionsareillustratedinthetable. Table I – Read/Write Control NOTES: 1. "H" = VIH, "L" = VIL, "X" = Don’t Care, "Z "= High Impedance 2. For valid write operation, no more than one port can write to the same address location at the same time. 3241 drw 09 ADDR"A" tWC DATA"B" MATCH tWP R/ W"A" DATAIN"A" ADDR"B" tDH VALID MATCH VALID tDDD tWDD tDW NOTES: 1. OE = VIL for the reading ports. 2. All timing is the same for left and right ports. Port "A" may be either of the four ports and Port "B" is any other port. Any Port(1) R/W CE OE D0-7 Function X H X Z Port Deselected: Power-Down XH X Z CEP1 =CEP2=CEP3=CEP4=VIH Power Down Mode ISB or ISB1 LL X DATAIN Data on port written into memory(2) HL L DATAOUT Data in memory output on port XX H Z Outputs Disabled 3241 tbl 11 |
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