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IDT7034S Datasheet(PDF) 10 Page - Integrated Device Technology |
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IDT7034S Datasheet(HTML) 10 Page - Integrated Device Technology |
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10 / 19 page  IDT7034S/L High-Speed 4K x 18 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 10 Timing Waveforme of Semaphore Read After Write Timing, Either Side(1) NOTE: 1. CE = VIH or UB & LB = VIH for the duration of the above timing (both write and read cycle). 2. "DATAOUT VALID' represents all I/Os (I/O0-I/O17) equal to the semaphore value. NOTES: 1. DOR = DOL = VIL, CER = CEL = VIH, or both UB & LB = VIH. 2. All timing is the same for left and right port. Port “A” may be either left or right port. Port “B” is the opposite from port “A”. 3. This parameter is measured from R/W"A" or SEM"A" going HIGH to R/W"B" or SEM"B" going HIGH. 4. If tSPS is not satisfied, there is no guarantee which side will obtain the semaphore flag. Timing Waveform of Semaphore Write Contention(1,3,4) SEM 4089 drw 09 tAW tEW tSOP DATA0 VALID ADDRESS tSAA R/ W tWR tOH tACE VALID ADDRESS DATAIN VALID DATA OUT tDW tWP tDH tAS tSWRD tAOE tSOP Read Cycle Write Cycle A0 -A2 OE VALID(2) SEM"A" 4089 drw 10 tSPS MATCH R/ W"A" MATCH A0"A"-A2"A" SIDE "A" (2) SEM"B" R/ W"B" A0"B"-A2"B" SIDE (2) "B" |
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