CPU Supervisor with Nonvolatile Memory and

Programmable I/O

____________________________________________________________________

11

dition, write the slave address (R/

W = 0), and the first

memory address of the next page before continuing to

write data.

Acknowledge Polling: Any time an EEPROM page is

written, the DS4510 requires the EEPROM write time

page to EEPROM. During the EEPROM write time, the

DS4510 does not acknowledge its slave address

because it is busy. It is possible to take advantage of

that phenomenon by repeated addressing the DS4510,

which allows the next page to be written as soon as the

DS4510 is ready to receive the data. The alternative to

acknowledge polling is to wait for maximum period of

DS4510.

EEPROM Write Cycles: When EEPROM writes occur,

the DS4510 writes the whole EEPROM memory page

even if only a single byte on the page was modified.

Writes that do not modify all 8 bytes on the page are

allowed and do not corrupt the remaining bytes of

memory on the same page. Because the whole page is

written, bytes on the page that were not modified dur-

ing the transaction are still subject to a write cycle. This

can result in a whole page being worn out over time by

writing a single byte repeatedly. Writing a page one

byte at a time wears the EEPROM out eight times faster

than writing the entire page at once. The DS4510’s

EEPROM memory is guaranteed to handle 50,000 write

cycles at +70°C. Writing to SEEPROM memory with

SEE = 1 does not count as an EEPROM write cycle

when evaluating the EEPROM’s estimated lifetime.

Reading a Single Byte from a Slave: Unlike the write

operation that uses the memory address byte to define

where the data is to be written, the read operation

occurs at the present value of the memory address

counter. To read a single byte from the slave the mas-

ter generates a start condition, writes the slave address

with R/

W = 1, reads the data byte with a NACK to indi-

cate the end of the transfer, and generates a stop con-

dition.

Manipulating the Address Counter for Reads: A

dummy write cycle can be used to force the address

counter to a particular value. To do this the master gen-

erates a start condition, writes the slave address (R/

W

= 0), writes the memory address where it desires to

read, generates a repeated start condition, writes the

slave address (R/

W = 1), reads data with ACK or NACK

as applicable, and generates a stop condition.

start condition dummy write cycle.

Reading Multiple Bytes from a Slave: The read oper-

ation can be used to read multiple bytes with a single

transfer. When reading bytes from the slave, the master

simply ACKs the data byte if it desires to read another

byte before terminating the transaction. After the mas-

ter reads the last byte it NACKs to indicate the end of

the transfer and generates a stop condition. This can

be done with or without modifying the address

counter’s location before the read cycle. The DS4510

does not wrap on page boundaries during read opera-

tions, but the counter rolls from its upper-most memory

address FFh to 00h if the last memory location is read

during the read transaction.

Example: The entire memory contents of the DS4510

can be read with a single transfer starting at address

F0h that reads 80 bytes of data. Addresses F0h to FFh

are read sequentially, the address counter rolls to 00h,

and then addresses 00h to 3Fh can be read sequential-

ly. This allows the entire memory contents to be read in

a single operation without reading the undefined con-

tents of the reserved area of the memory.

Application Information

Advantages of Using the

SEE Bit to Disable

EEPROM Writes

The

SEE bit allows EEPROM writes to be disabled for

the SRAM-shadowed EEPROM bytes, allowing the

SRAM of SEE registers to change without writing the

EEPROM to the same value. This prevents write opera-

tions from changing the power-on value of the I/O pins,

reduces the number of EEPROM write cycles, and

speeds up I/O operations because the DS4510 does

not require an internally timed EEPROM write cycle to

complete the operation.

Power-Supply Decoupling

To achieve the best results when using the DS4510,

decouple the power supply with a 0.01µF or a 0.1µF

capacitor. Use high-quality, ceramic, surface-mount

capacitors, and mount the capacitors as close as pos-

mize lead inductance.

SDA and SCL Pullup Resistors

SDA is an open-collector output on the DS4510 that

requires a pullup resistor to realize high logic levels.

Because the DS4510 does not utilize clock cycle

stretching, a master using either an open-collector out-

put with a pullup resistor or a normal output driver can

be utilized for SCL. Pullup resistor values should be

chosen to ensure that the rise and fall times listed in the

AC Electrical Characteristics are within specification.