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GLT5160L16I-6TC Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers |
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GLT5160L16I-6TC Datasheet(HTML) 8 Page - List of Unclassifed Manufacturers |
8 / 45 page 8 G-LINK Technology DEC. 2003 (Rev. 2.4) Power On Sequence Before starting normal operation, the following power on sequence is necessary to prevent damage or malfunction. 1. Apply power and start clock. Attempt to maintain CKE high, DQMU / DQML high and NOP condition at the inputs. 2. Maintain stable power, stable clock, and NOP input condi- tions for a minimum of 200 µs. 3. Issue precharge commands for all banks. (PRE or PREA) 4. After all banks become idle state (after tRP), issue 2 or more auto-refresh commands. 5. Issue a mode register set command to initialize the mode register. After this sequence, the SDRAM is idle state and ready for normal operation. MODE REGISTER SET PRECHARGE POWER ON POWER APPLIED PRE SELF REFRESH IDLE AUTO REFRESH CLK SUSPEND ROW WRITE SUSPEND WRITE READ READ SUSPEND WRITE A SUSPEND WRITE A READ A READ A SUSPEND PRE PRE PRE CKE CKE CKE CKE CKE CKE CKE CKE WRITE READE WRITE READE WRITE READ WRITE READE WRIT REA POWER DOWN CKE CKE ACT CKE CKE MRS REF REF REFS Automatic Sequence Command Sequence Figure 2. Simplified State Diagram TBST TBST |
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