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71V321L25TFG Datasheet(PDF) 4 Page - Integrated Device Technology |
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71V321L25TFG Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 15 page 6.42 IDT71V321S/L High Speed 3.3V 2K x 8 Dual-Port Static RAM with Interrupts Industrial and Commercial Temperature Ranges 4 DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(1,2) (VCC = 3.3V ± 0.3V) NOTES: 1. 'X' in part numbers indicates power rating (S or L). 2. VCC = 3.3V, TA = +25°C, and are not production tested. ICCDC = 70mA (Typ.). 3. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC and using "AC Test Conditions" of input levels of GND to 3V. 4. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby. 5. Port "A" may be either left or right port. Port "B" is opposite from port "A". Symbol Parameter Test Condition Version 71V321X25 Com'l & Ind 71V321X35 Com'l & Ind 71V321X55 Com'l & Ind Unit Typ. Max. Typ. Max. Typ. Max. ICC Dynamic Operating Current (Both Ports Active) CE = VIL , Outputs Disabled SEM = VIH f = fMAX(3) COM'L S L 55 55 130 100 55 55 125 95 55 55 115 85 mA IND L 55 130 55 125 55 115 ISB1 Standby Current (Both Ports - TTL Level Inputs) CER = CEL = VIH SEMR = SEML = VIH f = fMAX(3) COM'L S L 15 15 35 20 15 15 35 20 15 15 35 20 mA IND L 15 35 15 35 15 35 ISB2 Standby Current (One Port - TTL Level Inputs) CE"A" = VIL and CE"B" = VIH(5) Active Port Outputs Disabled, f=fMAX(3) SEMR = SEML = VIH COM'L S L 25 25 75 55 25 25 70 50 25 25 60 40 mA IND L 25 75 25 70 25 60 ISB3 Full Standby Current (Both Ports - All CMOS Level Inputs) Both Ports CEL and CER > VCC - 0.2V VIN > VCC - 0.2V or VIN < 0.2V, f = 0(4) SEMR = SEML > VCC - 0.2V COM'L S L 1.0 0.2 5 3 1.0 0.2 5 3 1.0 0.2 5 3 mA IND L 0.2 6 1.0 5 1.0 5 ISB4 Full Standby Current (One Port - All CMOS Level Inputs) CE"A" < 0.2V and CE"B" > VCC - 0.2V(5) SEMR = SEML > VCC - 0.2V VIN > VCC - 0.2V or VIN < 0.2V Active Port Outputs Disabled f = fMAX(3) COM'L S L 25 25 70 55 25 25 65 50 25 25 55 40 mA IND L 25 70 25 65 25 55 3026 tbl 06 Data Retention Characteristics (L Version Only) Symbol Parameter Test Condition Min. Typ. (1) Max. Unit VDR VCC for Data Retention 2.0 ___ 0V ICCDR Data Retention Current VCC = 2V, CE > VCC - 0.2V COM'L. ___ 100 500 µA tCDR(3) Chip Deselect to Data Retention Time VIN > VCC - 0.2V or VIN < 0.2V IND. ___ 100 1000 µA 0 ___ ___ V tR(3) Operation Recovery Time tRC(2) ___ ___ V 3026 tbl 07 NOTES: 1. VCC = 2V, TA = +25°C, and is not production tested. 2. tRC = Read Cycle Time. 3. This parameter is guaranteed by device characterization but not production tested. |
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