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71V30S55TFG8 Datasheet(PDF) 9 Page - Integrated Device Technology |
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71V30S55TFG8 Datasheet(HTML) 9 Page - Integrated Device Technology |
9 / 15 page 6.42 IDT71V30S/L High-Speed 1K x 8 Dual-Port Static RAM with Interrupts Industrial and Commercial Temperature Ranges 9 tWC tWP tDW tDH tBDD tDDD tBDA tWDD ADDR"B" DATAOUT"B" DATAIN"A" ADDR"A" MATCH VALID MATCH VALID BUSY"B" 3741 drw 10 (1) tAPS R/ W"A" NOTES: 1. To ensure that the earlier of the two ports wins. 2. CEL = CER = VIL 3. OE = VIL for the reading port. 4. All timing is the same for the left and right ports. Port 'A' may be either the left or right port. Port "B" is opposite from port "A". Timing Waveform of Write with Port-to-Port Read with BUSY(1,2,3,4) AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(6,7) NOTES: 1. Port-to-port delay through SRAM cells from writing port to reading port, refer to "Timing Waveform of Write with Port-to-Port Read with BUSY". 2. To ensure that the earlier of the two ports wins. 3. tBDD is a calculated parameter and is the greater of 0, tWDD – tWP (actual) or tDDD – tDW (actual). 4. To ensure that the Write Cycle is inhibited on Port “B” during contention on Port “A”. 5. To ensure that the Write Cycle is completed on Port “B” after contention on Port “A”. 6. 'X' in part number indicates power rating (S or L). 7. Industrial temperature: for specific speeds, packages and powers contact your sales office. 71V30X25 Com'l Only 71V30X35 Com'l & Ind 71V30X55 Com'l Only Unit Symbol Parameter Min. Max. Min. Max. Min. Max. BUSY TIMING (M/S=VIH) tBAA BUSY Access Time from Address Match ____ 20 ____ 20 ____ 30 ns tBDA BUSY Disable Time from Address Not Matched ____ 20 ____ 20 ____ 30 ns tBAC BUSY Access Time from Chip Enable ____ 20 ____ 20 ____ 30 ns tBDC BUSY Disable Time from Chip Enable ____ 20 ____ 20 ____ 30 ns tWH Write Hold After BUSY(5) 20 ____ 30 ____ 40 ____ ns tWDD Write Pulse to Data Delay(1) ____ 50 ____ 60 ____ 80 ns tDDD Write Data Valid to Read Data Delay(1) ____ 35 ____ 45 ____ 65 ns tAPS Arbitration Priority Set-up Time(2) 5 ____ 5 ____ 5 ____ ns tBDD BUSY Disable to Valid Data(3) ____ 30 ____ 30 ____ 45 ns 3741 tbl 11 |
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