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IDT70V09L Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT70V09L Datasheet(HTML) 4 Page - Integrated Device Technology |
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4 / 17 page  IDT70V09L High-Speed 128K x 8 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 4 Truth Table III – Semaphore Read/Write Control(1) Truth Table I – Chip Enable(1,2) NOTES: 1. Chip Enable references are shown above with the actual CE0 and CE1 levels; CE is a reference only. 2. 'H' = VIH and 'L' = VIL. 3. CMOS standby requires 'X' to be either < 0.2V or >VCC-0.2V. Truth Table II – Non-Contention Read/Write Control NOTES: 1. A0L — A16L ≠ A0R — A16R 2. Refer to Truth Table I - Chip Enable. NOTES: 1. There are eight semaphore flags written to I/O0 and read from all the I/Os (I/O0-I/O7). These eight semaphore flags are addressed by A0-A2. 2. Refer toTruth Table I - Chip Enable . CE CE0 CE1 Mode L VIL VIH Port Selected (TTL Active) < 0.2V >VCC -0.2V Port Selected (CMOS Active) H VIH X Port Deselected (TTL Inactive) XVIL Port Deselected (TTL Inactive) >VCC -0.2V X(3) Port Deselected (CMOS Inactive) X(3) <0.2V Port Deselected (CMOS Inactive) 4852 tbl 06 Inputs(1) Outputs Mode CE(2) R/W OE SEM I/O0-7 H X X H High-Z Deselected: Power-Down LL X H DATAIN Write to Memory LH LH DATAOUT Read Memory X X H X High-Z Outputs Disabled 4852 tbl 07 Inputs Outputs Mode CE(2) R/W OE SEM I/O0-7 HH L L DATAOUT Read Semaphore Flag Data Out H ↑ XL DATAIN Write I/O0 into Semaphore Flag LX X L ______ Not Allowed 4852 tbl 08 |
Similar Part No. - IDT70V09L_13 |
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Similar Description - IDT70V09L_13 |
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