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70V38L15PFGI Datasheet(PDF) 7 Page - Integrated Device Technology

Part # 70V38L15PFGI
Description  HIGH-SPEED 3.3V 64K x 18 DUAL-PORT STATIC RAM
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

70V38L15PFGI Datasheet(HTML) 7 Page - Integrated Device Technology

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IDT70V38L
High-Speed 3.3V 64K x 18 Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
70V38L15
Com'l Only
70V38L20
Com'l
& Ind
Unit
Symbol
Parameter
Min.Max.Min.Max.
READ CYCLE
tRC
Read Cycle Time
15
____
20
____
ns
tAA
Address Access Time
____
15
____
20
ns
tACE
Chip Enable Access Time(3)
____
15
____
20
ns
tABE
Byte Enable Access Time(3)
____
15
____
20
ns
tAOE
Output Enable Access Time
____
10
____
12
ns
tOH
Output Hold from Address Change
3
____
3
____
ns
tLZ
Output Low-Z Time(1,2)
3
____
3
____
ns
tHZ
Output High-Z Time(1,2)
____
10
____
10
ns
tPU
Chip Enable to Power Up Time(2)
0
____
0
____
ns
tPD
Chip Disable to Power Down Time(2)
____
15
____
20
ns
tSOP
Semaphore Flag Update Pulse (OE or SEM)10
____
10
____
ns
tSAA
Semaphore Address Access Time
____
15
____
20
ns
4850 tbl 12
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load (Figure 2).
2. Thisparameterisguaranteedbydevicecharacterization,butisnotproductiontested.
3. To access RAM, CE= VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL. Either condition must be valid for the entire tEW time.
4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage and
temperature, the actual tDH will always be smaller than the actual tOW.
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage
Symbol
Parameter
70V38L15
Com'l Only
70V38L20
Com'l
& Ind
Unit
Min.
Max.
Min.
Max.
WRITE CYCLE
tWC
Write Cycle Time
15
____
20
____
ns
tEW
Chip Enable to End-of-Write(3)
12
____
15
____
ns
tAW
Address Valid to End-of-Write
12
____
15
____
ns
tAS
Address Set-up Time(3)
0
____
0
____
ns
tWP
Write Pulse Width
12
____
15
____
ns
tWR
Write Recovery Time
0
____
0
____
ns
tDW
Data Valid to End-of-Write
10
____
15
____
ns
tHZ
Output High-Z Time(1,2)
____
10
____
10
ns
tDH
Data Hold Time(4)
0
____
0
____
ns
tWZ
Write Enable to Output in High-Z(1,2)
____
10
____
10
ns
tOW
Output Active from End-of-Write(1,2,4)
0
____
0
____
ns
tSWRD
SEM
Flag Write to Read Time
5
____
5
____
ns
tSPS
SEM
Flag Contention Window
5
____
5
____
ns
4850 tbl 13


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