10

64 x 36 x 2

COMMERCIALTEMPERATURERANGE

andreadoperationsandarenotrelatedtohigh-impedancecontrolofthedata

outputs. If a port enable is LOW during a clock cycle, the port chip select and

write/readselectmaychangestatesduringthesetupandholdtimewindowof

thecycle.

SYNCHRONIZED FIFO FLAGS

Each FIFO is synchronized to its port clock through two flip-flop stages.

This is done to improve flag reliability by reducing the probability of

metastable events on the output when CLKA and CLKB operate asynchro-

nously to one another. EFA, AEA, FFA, and AFA are synchronized by

CLKA. EFB, AEB, FFB, and AFB are synchronized to CLKB. Tables 4 and

5 show the relationship of each port flag to the level of FIFO1 and FIFO2 fill.

EMPTY FLAGS (EFA, EFB)

The Empty Flag of a FIFO is synchronized to the port clock that reads

data from its array. When the Empty Flag is HIGH, new data can be read

tothe FIFO output register. WhentheEmpty Flag is LOW,theFIFOis empty

and attempted FIFO reads are ignored.

The read pointer of a FIFO is incremented each time a new word is

clocked to the output register. The state machine that controls an Empty

Flag monitors a write-pointer and read-pointer comparator that indicates

when the FIFO memory status is empty, empty+1, or empty+2. A word

written to a FIFO can be read to the FIFO output register in a minimum of

three cycles of the Empty Flag synchronizing clock. Therefore, an Empty

Flag is LOW if a word in memory is the next data to be sent to the FIFO output

register and two cycles of the port clock that reads data from the FIFO have

not elapsed since the time the word was written. The Empty Flag of the FIFO

is set HIGH by the second LOW-to-HIGH transition of the synchronizing

clock, and the new data word can be read to the FIFO output register in the

following cycle.

A LOW-to-HIGH transition on an Empty Flag synchronizing clock begins

the first synchronization cycle of a write if the clock transition occurs at time

be the first synchronization cycle (see Figure 7 and Figure 8).

FULL FLAG (FFA, FFB)

The Full Flag of a FIFO is synchronized to the port clock that writes data

to its array. When the Full Flag is HIGH, a memory location is free in the

FIFO to receive new data. No memory locations are free when the Full Flag

is LOW and attempted writes to the FIFO are ignored.

EachtimeawordiswrittentoaFIFO,thewritepointerisincremented. The

statemachinethatcontrolsaFullFlagmonitorsawrite-pointerandreadpointer

comparatorthatindicateswhentheFIFOmemorystatusisfull,full-1,orfull-2.

Synchronized

Synchronized

Number of Words

to CLKB

to CLKA

EFB

AEB

AFA

FFA

0L

L

H

H

1 to X

H

L

H

H

(X+1) to [64-(X+1)]

H

H

H

H

(64-X) to 63

H

H

L

H

64

H

H

L

L

Synchronized

Synchronized

Number of Words

to CLKB

to CLKA

EFA

AEA

AFB

FFB

0L

L

H

H

1 to X

H

L

H

H

(X+1) to [64-(X+1)]

H

H

H

H

(64-X) to 63

H

H

L

H

64

H

H

L

L

NOTE:

1. X is the value in the Almost-Empty flag and Almost-Full flag offset register.

FromthetimeawordisreadfromaFIFO,thepreviousmemorylocationisready

tobewritteninaminimumofthreecyclesoftheFullFlagsynchronizingclock.

Therefore,aFullFlagisLOWiflessthantwocyclesoftheFullFlagsynchronizing

clockhaveelapsedsincethenextmemorywritelocationhasbeenread. The

secondLOW-to-HIGHtransitionontheFullFlagsynchronizationclockafterthe

readsetstheFullFlagHIGHandthedatacanbewritteninthefollowingclock

cycle.

A LOW-to-HIGH transition on a Full Flag synchronizing clock begins the

first synchronization cycle of a read if the clock transition occurs at time

be the first synchronization cycle (see Figure 9 and Figure 10).

ALMOST EMPTY FLAGS (AEA, AEB)

The Almost-Empty flag of a FIFO is synchronized to the port clock that

reads data from its array. The state machine that controls an Almost-Empty

flag monitors a write-pointer comparator that indicates when the FIFO

memory status is almost-empty, almost-empty+1, or almost-empty+2. The

almost-empty state is defined by the value of the Almost-Full and Almost-

Empty Offset register (X). This register is loaded with one of four preset

values during a device reset (see Reset section). An Almost-Empty flag is

LOW when the FIFO contains X or less words in memory and is HIGH when

the FIFO contains (X+1) or more words.

Two LOW-to-HIGH transitions of the Almost-Empty flag synchroniz-

ing clocks are required after a FIFO write for the Almost-Empty flag to reflect

the new level of fill. Therefore, the Almost-Empty flag of a FIFO containing

(X+1) or more words remains LOW if two cycles of the synchronizing clock

have not elapsed since the write that filled the memory to the (X+1) level.

An Almost-Empty flag is set HIGH by the second LOW-to-HIGH transition

of the synchronizing clock after the FIFO write that fills memory to the (X+1)

level. A LOW-to-HIGH transition of an Almost-Empty flag synchronizing

greater after the write that fills the FIFO to (X+1) words. Otherwise, the

subsequent synchronizing clock cycle can be the first synchronization cycle

(see Figure 11 and 12).

ALMOST FULL FLAGS (AFA, AFB)

The Almost-Full flag of a FIFO is synchronized to the port clock that

writes data to its array. The state machine that controls an Almost-Full flag

monitorsawrite-pointerandread-pointercomparatorthatindicateswhenthe

FIFOmemorystatusisalmost-full,almost-full-1,oralmost-full-2. Thealmost-full

stateisdefinedbythevalueoftheAlmost-FullandAlmost-EmptyOffsetregister

(X). Thisregisterisloadedwithoneoffourpresetvaluesduringadevicereset

(seeResetsection). AnAlmost-FullflagisLOWwhentheFIFOcontains(64-

TABLE 4 – FIFO1 FLAG OPERATION

TABLE 5 – FIFO2 FLAG OPERATION