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ADC3241 Datasheet(PDF) 5 Page - Texas Instruments |
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ADC3241 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 71 page  5 THS4552 www.ti.com SBOS831 – DECEMBER 2016 Product Folder Links: THS4552 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. (3) ESD limit of ±1000 V for any pin to thermal pad. Pin-to-pin HBM ESD specifications are rated at ±2500 V. 7.2 ESD Ratings VALUE UNIT A. THS4552 in PW Pacakges V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±1250 B. THS4552 in RTW Package V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(3) ±1000 V Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±1250 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VS+ Single-supply positive voltage 2.7 5 5.4 V TA Ambient temperature –40 25 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. (2) Thermal impedance for RTW reported with backside thermal pad soldered to heat spreading plane. 7.4 Thermal Information THERMAL METRIC(1) THS4552 UNIT RTW(2) (VQFN) PW (TSSOP) 24 PINS 16 PINS RθJA Junction-to-ambient thermal resistance 46.0 117.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 34.6 48.8 °C/W RθJB Junction-to-board thermal resistance 19.7 70.2 °C/W ψJT Junction-to-top characterization parameter 10.0 21.1 °C/W ψJB Junction-to-board characterization parameter 19.7 69.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 12.9 N/A °C/W |
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