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7280L15PAIG Datasheet(PDF) 8 Page - Integrated Device Technology |
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7280L15PAIG Datasheet(HTML) 8 Page - Integrated Device Technology |
8 / 12 page 8 COMMERCIALTEMPERATURERANGE IDT7280/7281/7282/7283/7284/7285 5V ASYNCHRONOUS FIFO DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9 JUNE 29, 2012 Figure 13. Block Diagram of 256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18, 4,096 x 18, 8,192 x 18 FIFO Memory Used in Width Expansion Mode Figure 12. Block Diagram of One 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 FIFO Used in Single Device Mode USAGE MODES: WIDTH EXPANSION Wordwidthmaybeincreasedsimplybyconnectingthecorrespondinginput controlsignalsofmultipleFIFOs.Statusflags(EF,FFandHF)canbedetected fromanyoneFIFO. Figure13demonstratesan18-bitwordwidthbyusingthe twoFIFOscontainedintheIDT7280/7281/7282/7283/7284/7285s.Anyword width can be attained by adding FIFOs (Figure 13). BIDIRECTIONAL OPERATION Applications which require data buffering between two systems (each system capable of Read and Write operations) can be achieved by pairing IDT7280/7281/7282/7283/7384/7285s as shown in Figure 16. Both Depth Expansion and Width Expansion may be used in this mode. DATAFLOW-THROUGH Two types of flow-through modes are permitted, a read flow-through and write flow-through mode. For the read flow-through mode (Figure 17), theFIFOpermitsareadingofasinglewordafterwritingonewordofdatainto anemptyFIFO.Thedataisenabledonthebusin(tWEF+tA)nsaftertherising edgeofW,calledthefirstwriteedge,anditremainsonthe busuntiltheRline is raised from LOW-to-HIGH, after which the bus would go into a three-state mode after tRHZ ns. The EF line would have a pulse showing temporary deassertion and then would be asserted. In the write flow-through mode (Figure 18), the FIFO permits the writing of a single word of data immediately after reading one word of data from a fullFIFO.The RlinecausestheFFtobedeassertedbuttheWlinebeingLOW causesittobeassertedagaininanticipationofanewdataword.Ontherising edgeofW,thenewwordisloadedintheFIFO.TheWlinemustbetoggledwhen FFisnotassertedtowritenewdataintheFIFOandtoincrementthewritepointer. COMPOUND EXPANSION The two expansion techniques described above can be applied together in a straightforward manner to achieve large FIFO arrays (see Figure 15). WRITE ( W) DATA IN (D) FULL FLAG ( FF) RESET ( RS) 9 READ ( R) 9 DATA OUT (Q) EMPTY FLAG ( EF) RETRANSMIT ( RT) EXPANSION IN ( XI) ( HF) FIFO A or B IDT 7280 7281 7282 7283 7284 7285 (HALF-FULL FLAG) 3208 drw 14 XIA XIB 9 9 18 9 18 HFB HFA 9 DATA WRITE ( W) FULL FLAG ( FFA) RESET ( RS) (D) IN READ ( R) EMPTY FLAG ( EFB) RETRANSMIT ( RT) DATA (Q) OUT 3208 drw 15 FIFO A FIFO B 7280/7281/7282/ 7283/7284/7285 |
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