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EM47FM0888SBA-150E Datasheet(PDF) 5 Page - Eorex Corporation |
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EM47FM0888SBA-150E Datasheet(HTML) 5 Page - Eorex Corporation |
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5 / 39 page  Pin Description (Continued) Note: Input pins only BA0-BA2, A0-A15, /RAS , /CAS , /WE , /CS , CKE, ODT and /RESET do not supply EM47FM0888SBA termination. Jul. 2012 5/39 www.eorex.com C3,D3 DQS, /DQS (Data Strobe) Output with read data, input with write data. Edge-aligned with read data, centered in write data. The data strobe DQS is paired with differential signal /DQS to provide differential pair signaling to the system during reads and writes. DDR3 SDRAM supports differential data strobe only and does not support single-ended. B7,A7 TDQS, /TDQS (Termination Data Strobe) When enabled via Mode Register A11=1 in MR1, DRAM will enable the same termination resistance function on TDQS /TDQS that is applied to DQS/DQS. When disabled via mode register A11=0 in MR1, DM/TDQS will provide the data mask function and /TDQS is not used. F3, G3, H3 /RAS , /CAS , /WE (Command Inputs) /RAS , /CAS and /WE (along with /CS ) define the command being entered. B3,C7,C2,C8,E3, E8,D2,E7 DQ0~7 (Data Input/Output) Data inputs and outputs are on the same pin. A2,A9,D7,G2,G8, K1,K9,M1,M9/A1, A8,B1,D8,F2,F8,J1 ,J9,L1,L9,N1,N9 VDD,VSS (Power Supply/Ground) VDD and VSS are power supply for internal circuits. B9,C1,E2,E9 /B2,B8,C9,D1,D9 VDDQ ,VSSQ (DQ Power Supply/DQ Ground) VDDQ and VSSQ are power supply for the output buffers. H8 ZQ (ZQ Calibration) Reference pin for ZQ calibration N2 /RESET (Active Low Asynchronous Reset) Reset is active when /RESET is LOW, and inactive when /RESET is HIGH. /RESET must be HIGH during normal operation. /RESET is a CMOS rail to rail signal with DC high and low at 80% and 20% of VDD, i.e. 1.20V for DC high and 0.30V for DC low. E1 VREFDQ (Reference Voltage) Reference voltage for DQ J8 VREFCA (Reference Voltage) Reference voltage for CA A3,F1,H1,F9, H9 NC (No Connection) No internal electrical connection is present. |
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