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TPS562219ADDFT Datasheet(PDF) 11 Page - Texas Instruments

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Part # TPS562219ADDFT
Description  4.5-V to 17-V Input, 2-A, 3-A Synchronous Step-Down Voltage Regulator in 8 Pin SOT-23
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS562219ADDFT Datasheet(HTML) 11 Page - Texas Instruments

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background image
FBTH
Css V
0.86
Tss(ms)
Iss
´
´
=
11
TPS562219A, TPS563219A
www.ti.com
SLVSDT2 – NOVEMBER 2016
Product Folder Links: TPS562219A TPS563219A
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Feature Description (continued)
7.3.2 Soft Start and Pre-Biased Soft Start
The TPS562219A and TPS563219A have adjustable soft-start. When the EN pin becomes high, the SS charge
current (ISS) begins charging the capacitor which is connected from the SS pin to GND (CSS). Smooth control of
the output voltage is maintained during start up. The equation for the soft start time, TSS is shown in Equation 1.
(1)
where VFBTH is 0.765 V and Iss is 6 µA.
If the output capacitor is pre-biased at startup, the devices initiate switching and start ramping up only after the
internal reference voltage becomes greater than the feedback voltage VFB. This scheme ensures that the
converters ramp up smoothly into regulation point.
7.3.3 Power Good
The power good output, PG is an open drain output. The power good function becomes active after 1.7 times
soft-start time. When the output voltage becomes within –10% of the target value, internal comparators detect
power good state and the power good signal becomes high. If the feedback voltage goes under 15% of the target
value, the power good signal becomes low.
7.3.4 Current Protection
The output over-current limit (OCL) is implemented using a cycle-by-cycle valley detect control circuit. The switch
current is monitored during the OFF state by measuring the low-side FET drain to source voltage. This voltage is
proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated.
During the on time of the high-side FET switch, the switch current increases at a linear rate determined by VIN,
VOUT, the on-time and the output inductor value. During the on time of the low-side FET switch, this current
decreases linearly. The average value of the switch current is the load current IOUT. If the monitored current is
above the OCL level, the converter maintains low-side FET on and delays the creation of a new set pulse, even
the voltage feedback loop requires one, until the current level becomes OCL level or lower. In subsequent
switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner. If the over
current condition exists consecutive switching cycles, the internal OCL threshold is set to a lower level, reducing
the available output current. When a switching cycle occurs where the switch current is not above the lower OCL
threshold, the counter is reset and the OCL threshold is returned to the higher value.
There are some important considerations for this type of over-current protection. The load current is higher than
the over-current threshold by one half of the peak-to-peak inductor ripple current. Also, when the current is being
limited, the output voltage tends to fall as the demanded load current may be higher than the current available
from the converter. This may cause the output voltage to fall. When the VFB voltage falls below the UVP
threshold voltage, the UVP comparator detects it. And then, the device will shut down after the UVP delay time
(typically 14 µs) and re-start after the hiccup time.
When the over current condition is removed, the output voltage returns to the regulated value.
7.3.5 Over Voltage Protection
TPS562219A and TPS563219A detect over voltage condition by monitoring the feedback voltage (VFB). When
the feedback voltage becomes higher than 125% of the target voltage, the OVP comparator output goes high
and the high-side MOSFET turns off. This function is non-latch operation.
7.3.6 UVLO Protection
Under voltage lock out protection (UVLO) monitors the internal regulator voltage. When the voltage is lower than
UVLO threshold voltage, the device is shut off. This protection is non-latching.
7.3.7 Thermal Shutdown
The device monitors the temperature of itself. If the temperature exceeds the threshold value (typically 155°C),
the device is shut off. This is a non-latch protection.


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