(

)

L

)

on

(

DS

OUT

(min)

OUT

(min)

IN

R

R

I

V

V

+

+

=

ON

OUT

IN

peak

LPSM

t

L

V

V

I

×

-

=

)

(

)

(

ns

V

V

t

IN

OUT

ON

400

×

=

10

TPS62130A-Q1, TPS62133A-Q1, TPS6213013A-Q1

SLVSCC2B – MAY 2014 – REVISED NOVEMBER 2016

www.ti.com

Product Folder Links: TPS62130A-Q1 TPS62133A-Q1 TPS6213013A-Q1

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Copyright © 2014–2016, Texas Instruments Incorporated

Feature Description (continued)

space

(1)

space

For very small output voltages, an absolute minimum on-time of about 80ns is kept to limit switching losses. The

operating frequency is thereby reduced from its nominal value, keeping efficiency high. Also the off-time can

typical peak inductor current in Power Save Mode can be approximated by:

space

(2)

space

regardless of the load current. The device maintains output regulation in PWM mode.

9.3.3 100% Duty-Cycle Operation

the output voltage. In this case, the device starts 100% duty cycle operation turning on the high-side switch

100% of the time. The high-side switch stays turned on as long as the output voltage is below the internal set

point. This allows the conversion of small input to output voltage differences, e.g. for longest operation time of

battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off.

The minimum input voltage to maintain output voltage regulation, depending on the load current and the output

voltage level, can be calculated as:

spacing

where:

•

•

•

(3)

9.3.4 Enable / Shutdown (EN)

When Enable (EN) is set High, the device starts operation. Shutdown is forced if EN is pulled Low with a

shutdown current of typically 1.5µA. During shutdown, the internal power MOSFETs as well as the entire control

circuitry are turned off. The internal resistive divider pulls down the output voltage smoothly. The EN signal must

be set externally to High or Low, the typical threshold values are 0.65V (rising) and 0.45V (falling). An internal

pull-down resistor of about 400kΩ is connected and keeps EN logic low, if Low is set initially and then the pin

gets floating. It is disconnected if the pin is set High.

Connecting the EN pin to an appropriate output signal of another power rail provides sequencing of multiple

power rails.

9.3.5 Soft Start / Tracking (SS/TR)

The internal soft start circuitry controls the output voltage slope during startup, avoiding excessive inrush current

and ensures a controlled output voltage rise time. It also prevents unwanted voltage drops from high-impedance

power sources or batteries. When EN is set to start device operation, the device starts switching after a delay of

Figure 32 and Figure 33 for typical startup operation.