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TH71221ELQBAA-000RE Datasheet(PDF) 11 Page - Melexis Microelectronic Systems |
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TH71221ELQBAA-000RE Datasheet(HTML) 11 Page - Melexis Microelectronic Systems |
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11 / 44 page  TH71221 27 to 930MHz FSK/FM/ASK Transceiver 39010 071221 Page 11 of 44 Data Sheet Rev. 009 Nov/15 3.1.1 Reference Oscillator (XOSC) The reference oscillator is based on a Colpitts topology with two integrated functional capacitors as shown in figure 3. The circuitry is optimized for a load capacitance range of 10 pF to 15 pF. The equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure a fast and reliable start-up and a very stable frequency over the specified supply voltage and temperature range, the oscillator bias circuitry provides an amplitude regulation. The am- plitude on pin RO is monitored in order to regulate the current of the oscillator core IRO. There are two limits ROMAX and ROMIN between the regulation is maintained. These values can be changed via serial control interface in Programmable User Mode (PUM). In Stand-alone User Mode (SUM), ROMAX and ROMIN are set to default values (refer to para. 5.1.3). ROMAX defines the start-up current of the oscillator. The ROMIN value sets the de- sired steady-state current. If ROMIN is sufficient to achieve an amplitude of about 400 mV on pin RO, the current IRO will be set to ROMIN. Otherwise the current will be permanently regulated between ROMIN and ROMAX. If ROMIN and ROMAX are equal, no regulation takes place. For most of the applications ROMIN and ROMAX should not be changed from default. Fig. 3: Reference oscillator circuit 3.1.2 Reference Divider The reference divider provides the input signal of the phase detector by dividing the signal of the reference oscillator. The range of the reference divider is 1023 R 4 . (3) 3.1.3 Feedback Divider The feedback divider of the PLL is based on a pulse-swallow topology. It contains a 4-bit swallow A-counter, a 13-bit program B-counter and a prescaler. The divider ratio of the prescaler is controlled by the program counter and the swallow counter. During one cycle, the prescaler divides by 17 until the swallow A-counter reaches its terminal count. Afterwards the prescaler divides by 16 until the program counter reaches its terminal count. Therefore the overall feedback divider ratio can be expressed as: A) - (B 16 A 17 N . (4) The A-counter configuration represents the lower bits in the feedback divider register (N0-3 = A0-3) and the upper bits the B-counter configuration (N4-16 = B0-12) respectively. According to that, the following counter ranges are implemented: 15 A 0 ; 8191 B 4 whereas A B (5) and therefore the range of the overall feedback divider ratio results in: 131071 N 64 . (6) The user does not need to care about the A- and B-counter settings. It is only necessary to know the overall feedback divider ratio N to program the register settings. 3.1.4 Frequency Resolution and Operating Frequency It is obvious from (2) that, at a given frequency resolution fR, the maximum operating frequency of the VCO is limited by the maximum N-counter setting. The table below provides some illustrative numbers. Please also refer to section 4.4.1 for the pre-configured settings in Stand-alone User Mode (SUM). 36pF XTAL RO FSKSW CX2 CX1 VCC 36pF VEE IRO |
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