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TH71221ELQBAA-000RE Datasheet(PDF) 10 Page - Melexis Microelectronic Systems |
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TH71221ELQBAA-000RE Datasheet(HTML) 10 Page - Melexis Microelectronic Systems |
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10 / 44 page  TH71221 27 to 930MHz FSK/FM/ASK Transceiver 39010 071221 Page 10 of 44 Data Sheet Rev. 009 Nov/15 3 Functional Description 3.1 PLL Frequency Synthesizer The TH71221 contains an integer-N PLL frequency synthesizer. A PLL circuit performs the frequency syn- thesis via a feedback mechanism. The output frequency fVCO is generated as an integer multiple of the phase detector comparison frequency fR .This reference frequency fR is generated by dividing the output frequency fRO of a crystal oscillator. The phase detector utilizes this signal as a reference to tune the VCO and in the locked state it must be equal to the desired output frequency, divided by the feedback divider ratio N. Fig. 2: Integer-N PLL Frequency Synthesizer Topology The output frequency of the synthesizer fVCO can be selected by programming the feedback divider and the reference divider. The only constraint for the frequency output of the system is that the minimum frequency resolution, or the channel spacing, must be equal to the PFD frequency fR, which is given by the reference frequency fRO and the reference divider factor R: R f f RO R . (1) When the PLL is unlocked (e.g. during power up or during reprogramming of a new feedback divider ratio N), the phase-frequency detector PFD and the charge pump create an error signal proportional to the phase difference of the two input signals. This error signal is low-pass filtered through the external loop filter and input to the VCO to control its frequency. A very low frequency resolution increases the settling time of the PLL and reduces the ability to cancel out VCO perturbations, because the loop filter is updated every 1/fR. After the PLL has locked, the VCO frequency is given by the following equation: R RO VCO f N R f N f . (2) There are four registers available to set the VCO frequencies in receive (registers RR and NR) and in trans- mit mode (registers RT and NT). These registers can be programmed using the Serial Control Interface in Programmable User Mode (PUM). In case of Stand-alone User Mode (SUM), the registers are set fixed val- ues (refer to para. 4.1.1). The VCO frequency is equal to the carrier frequency in transmit mode. While in receive mode the VCO frequency is offset by the intermediate frequency IF. This is because of the super-heterodyne nature of the receive part. Feedback Divider Voltage Controlled Oscillator VCO f Reference Oscillator Reference Divider Phase-frequency Detector Charge Pump RO f N f R f External Loop Filter LF VCC |
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