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MC74HCU04ADR2G Datasheet(PDF) 3 Page - ON Semiconductor

Part # MC74HCU04ADR2G
Description  Hex Unbuffered Inverter
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC74HCU04ADR2G Datasheet(HTML) 3 Page - ON Semiconductor

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MC74HCU04A
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3
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) (continued)
Symbol
Unit
Guaranteed Limit
Test Conditions
Parameter
Symbol
Unit
≤ 125_C
≤ 85_C
–55 to
25
_C
VCC
V
Test Conditions
Parameter
VOL
Maximum Low−Level Output
Voltage
Vin = VCC
|Iout| v 20 mA
2.0
4.5
6.0
0.2
0.5
0.5
0.2
0.5
0.5
0.2
0.5
0.5
V
Vin = VCC
|Iout| ≤ 2.4 mA
|Iout| ≤ 4.0 mA
|Iout| ≤ 5.2 mA
3.0
4.5
6.0
0.32
0.32
0.32
0.32
0.37
0.37
0.32
0.40
0.40
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
±0.1
±1.0
±1.0
mA
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0 mA
6.0
1
10
40
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. For VCC = 2.0 V, Vout = 0.2 V or VCC − 0.2 V.
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
VCC
V
Guaranteed Limit
Unit
–55 to
25
_C
≤ 85_C
≤ 125_C
tPLH,
tPHL
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 2)
2.0
3.0
4.5
6.0
70
40
14
12
90
45
18
15
105
50
21
18
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
16
110
36
22
19
ns
Cin
Maximum Input Capacitance
10
10
10
pF
CPD
Power Dissipation Capacitance (Per Inverter)*
Typical @ 25
°C, VCC = 5.0 V
pF
15
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.
Figure 1. Switching Waveforms
tr
VCC
GND
90%
50%
10%
90%
50%
10%
INPUT A
OUTPUT Y
tPHL
tPLH
tTHL
tTLH
*Includes all probe and jig capacitance
Figure 2. Test Circuit
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3. Logic Detail
(1/6 of Device Shown)
tf
A
VCC
Y


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