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LAN9217-MT Datasheet(PDF) 10 Page - SMSC Corporation |
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LAN9217-MT Datasheet(HTML) 10 Page - SMSC Corporation |
10 / 139 page 16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX Support Datasheet Revision 2.9 (03-01-12) 10 SMSC LAN9217 DATASHEET 1.1 Block Diagram The SMSC LAN9217 integrated 10/100 MAC/PHY controller is a peripheral chip that performs the function of translating parallel data from a host controller into Ethernet packets. The LAN9217 Ethernet MAC/PHY controller is designed and optimized to function in an embedded environment. All communication is performed with programmed I/O transactions using the simple SRAM-like host interface bus. The diagram shown above, describes a typical system configuration of the LAN9217 in a typical embedded environment. The LAN9217 is a general purpose, platform independent, Ethernet controller. The LAN9217 consists of four major functional blocks. The four blocks are: 10/100 Ethernet PHY 10/100 Ethernet MAC RX/TX FIFOs Host Bus Interface (HBI) 1.2 Compatibility with First-generation LAN9118 Family Devices The LAN9217 is driver-, register-, and footprint-compatible with previous generation LAN9118 Family devices. Drivers written for these products will work with the LAN9217. However, in order to support HP Auto-MDIX, other components such as the magnetics and the passive components around the magnetics need to change, and supporting these changes does require a minor PCB change. A reference design for the LAN9217 will be available on SMSC’s website. Figure 1.1 System Block Diagram Microprocessor/ Microcontroller LAN9217 System Peripherals System Memory EEPROM (Optional) 25MHz XTAL System Bus Magnetics Ethernet LEDS/GPIO External PHY MII Magnetics Optional Optional |
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