MCP79402 datasheet(10/62 Pages) MICROCHIP

Part #	MCP79402

Description	Battery-Backed I2C Real-Time Clock/Calendar with SRAM and Protected EEPROM

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Manufacturer	MICROCHIP [Microchip Technology]

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MCP79400/MCP79401/MCP79402

DS20005009F-page 10

 2011-2016 Microchip Technology Inc.

FIGURE 4-2:

ACKNOWLEDGE TIMING

4.1.2

DEVICE ADDRESSING

The control byte is the first byte received following the

Start condition from the master device (Figure 4-3).

The control byte begins with a 4-bit control code. For

the MCP7940X, this is set as ‘1010’ for EEPROM read

and write operations, and ‘1101’ for SRAM/RTCC

register read and write operations. The next three bits

are non-configurable Chip Select bits that must always

be set to ‘1’.

The last bit of the control byte defines the operation to

be performed. When set to a ‘1’ a read operation is

selected, and when set to a ‘0’ a write operation is

selected.

The combination of the 4-bit control code and the three

Chip Select bits is called the slave address. Upon

receiving a valid slave address, the slave device

outputs an acknowledge signal on the SDA line.

Depending on the state of the R/W bit, the MCP7940X

will select a read or a write operation.

FIGURE 4-3:

CONTROL BYTE FORMAT

SCL

9

8

7

6

5

4

3

2

11

2

3

Transmitter must release the SDA line at this point

allowing the Receiver to pull the SDA line low to

acknowledge the previous eight bits of data.

Receiver must release the SDA line at this point

so the Transmitter can continue sending data.

Data from transmitter

SDA

Acknowledge

Bit

11

0

1

SACK

R/W

Control Code

Chip Select

Bits

Slave Address

Acknowledge Bit

Start Bit

Read/Write Bit

10

1

0

1

SACK

R/W

OR

EEPROM Control Byte

RTCC Register/SRAM Control Byte

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