IDT82P5088 datasheet(8/82 Pages) IDT

Part #	IDT82P5088

Description	Universal Octal T1/E1/J1 LIU with Integrated Clock Adapter

Download	82 Pages

Scroll/Zoom	100%

Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

Logo

8 / 82 page

IDT82P5088

UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER

List Of Figures

8

July 30, 2014

REVISION 1 DSC-7216/-

Figure-1

Block Diagram ................................................................................................................. 2

Figure-2

IDT82P5088 CABGA256 Package Pin Assignment (top view) ....................................... 9

Figure-3

E1 Waveform Template Diagram .................................................................................. 17

Figure-4

E1 Pulse Template Test Circuit ..................................................................................... 17

Figure-5

DSX-1 Waveform Template .......................................................................................... 18

Figure-6

T1 Pulse Template Test Circuit ..................................................................................... 18

Figure-7

Jitter Attenuator ............................................................................................................. 22

Figure-8

Receive Path Function Block Diagram .......................................................................... 24

Figure-9

Transmit/Receive Line Circuit ....................................................................................... 24

Figure-10

Monitoring Receive Line in Another Chip ...................................................................... 25

Figure-11

Monitor Transmit Line in Another Chip .......................................................................... 25

Figure-12

G.772 Monitoring Diagram ............................................................................................ 26

Figure-13

LOS Declare and Clear .................................................................................................27

Figure-14

Analog Loopback .......................................................................................................... 31

Figure-15

Digital Loopback ............................................................................................................ 31

Figure-16

Remote Loopback ......................................................................................................... 32

Figure-17

Auto Report Mode ......................................................................................................... 34

Figure-18

Manual Report Mode ..................................................................................................... 35

Figure-19

Clock Generator ............................................................................................................ 36

Figure-20

TCLK Operation Flowchart ............................................................................................ 36

Figure-21

Read Operation In SPI Mode ........................................................................................ 37

Figure-22

Write Operation In SPI Mode ........................................................................................ 37

Figure-23

JTAG Architecture ......................................................................................................... 60

Figure-24

JTAG State Diagram ..................................................................................................... 63

Figure-25

Transmit System Interface Timing ................................................................................ 70

Figure-26

Receive System Interface Timing ................................................................................. 70

Figure-27

T1/J1 Jitter Tolerance Performance Requirement ........................................................ 71

Figure-28

E1 Jitter Tolerance Performance Requirement ............................................................. 72

Figure-29

T1/J1 Jitter Transfer Performance Requirement (AT&T62411 / GR-253-CORE / TR-TSY-

000009)

74

Figure-30

E1 Jitter Transfer Performance Requirement (G.736) .................................................. 75

Figure-31

JTAG Interface Timing .................................................................................................. 76

Figure-32

Motorola Non-Multiplexed Mode Read Cycle ................................................................ 77

Figure-33

Motorola Non-Multiplexed Mode Write Cycle ................................................................ 78

Figure-34

Intel Non-Multiplexed Mode Read Cycle ....................................................................... 79

Figure-35

Intel Non-Multiplexed Mode Write Cycle ....................................................................... 79

Figure-36

SPI Timing Diagram ...................................................................................................... 80

List Of Figures

Similar Part No. - IDT82P5088

Manufacturer	Part #	Datasheet	Description
Integrated Device Techn...	IDT82P5088	1Mb / 81P	Universal Octal T1/E1/J1 LIU with Integrated Clock Adapter
Renesas Technology Corp	IDT82P5088	976Kb / 83P	Universal Octal T1/E1/J1 LIU with Integrated Clock Adapter July 30, 2014
Integrated Device Techn...	IDT82P5088BBBLANK	1Mb / 81P	Universal Octal T1/E1/J1 LIU with Integrated Clock Adapter

More results

Similar Description - IDT82P5088

Manufacturer	Part #	Datasheet	Description
Renesas Technology Corp	IDT82P5088	976Kb / 83P	Universal Octal T1/E1/J1 LIU with Integrated Clock Adapter July 30, 2014
Integrated Device Techn...	IDT82P5088	1Mb / 81P	Universal Octal T1/E1/J1 LIU with Integrated Clock Adapter
Exar Corporation	XRT86VL38	2Mb / 180P	OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
	XRT86VL38	2Mb / 183P	OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
	XRT86VL38	2Mb / 160P	OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
	XRT86VX38_0906	551Kb / 53P	OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
	XRT86VL38	1Mb / 66P	OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
	XRT86VX38IB329-F	382Kb / 61P	OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
Maxim Integrated Produc...	DS26303DK	2Mb / 43P	3.3V, E1/T1/J1, Short-Haul, Octal LIU Design Kit REV: 101105
Bel Fuse Inc.	APC82246	75Kb / 1P	T1/E1/J1 Line Interface Hybrid for Intel Octal LIU

More results

IDT82P5088 Datasheet(PDF) 8 Page - Integrated Device Technology

IDT82P5088 Datasheet(HTML) 8 Page - Integrated Device Technology

Similar Part No. - IDT82P5088

Similar Description - IDT82P5088

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

Datasheet Download

Link URL