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IRSM836-084MA Datasheet(PDF) 11 Page - Infineon Technologies AG |
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IRSM836-084MA Datasheet(HTML) 11 Page - Infineon Technologies AG |
11 / 20 page IRSM836-084MA 11 February 9, 2016 Fault Reporting and Programmable Fault Clear Timer The IRSM836-084MA provides an integrated fault reporting output and an adjustable fault clear timer. There are two situations that would cause the IRSM836-084MA to report a fault via the FLT pin. The first is an under-voltage condition of VCC and the second is when the ITRIP pin recognizes a fault. The fault clear timer provides a means of automatically re-enabling the module operation a preset amount of time after the fault condition has disappeared. When a fault condition occurs, the fault diagnostic output (FLT) stays in the low state until the fault condition has been removed and the fault clear timer expires; once the fault clear timer expires, the voltage on the FLT pin will return to the logic-high voltage. Figure 4a is a block-level diagram that focuses on the fault diagnostic and fault clear timer functionality of the driver chip within the module. The fault clear timer is defined with a simple resistor-capacitor (RC) network on the RCin pin, as shown in Figure 4b. Figure 5 is a timing diagram showing the states of the FLT and RCin pins during both normal operation and under a fault condition. Under normal operation, both FLT and RCin are in high impedance (open drain) states. CRCIN is fully-charged, and FLT is pulled up high. When a fault condition occurs, RCin and FLT are pulled low to VSS – C RCIN is discharged; once the fault condition has been removed, RCin returns to a high impedance state and the fault clear timer begins – that is, C RCIN starts charging via RRCIN. tFLTCLR seconds later – when the RCin voltage crosses a datasheet-defined threshold of VRCIN,TH, FLT returns to a high impedance state and the module is operational again. tFLTCLR is determined by a simple RC network, shown in Figure 6 - RRCIN and CRCIN determine how long the voltage at the RCin pin takes to reach the VRCIN,TH fixed threshold. Figure 4a: Block diagram showing internal functioning of fault diagnostic and fault clear timer Figure 4b: Programming the fault clear timer V cc HIN (x3) RCIN EN ITRIP VSS FLT VRx LIN (x3) VB ( x3) VS (x3) IRSM836-084MA I - RRCIN CRCIN |
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