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5P49V5935 Datasheet(PDF) 4 Page - Integrated Device Technology |
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5P49V5935 Datasheet(HTML) 4 Page - Integrated Device Technology |
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4 / 33 page  PROGRAMMABLE CLOCK GENERATOR 4 NOVEMBER 11, 2016 5P49V5935 DATASHEET PLL Features and Descriptions Spread Spectrum To help reduce electromagnetic interference (EMI), the 5P49V5935 supports spread spectrum modulation. The output clock frequencies can be modulated to spread energy across a broader range of frequencies, lowering system EMI. The 5P49V5935 implements spread spectrum using the Fractional-N output divide, to achieve controllable modulation rate and spreading magnitude. The Spread spectrum can be applied to any output clock, any clock frequency, and any spread amount from ±0.25% to ±2.5% center spread and -0.5% to -5% down spread. Table 2: Loop Filter PLL loop bandwidth range depends on the input reference frequency (Fref) and can be set between the loop bandwidth range as shown in the table below. Table 3: Configuration Table This table shows the SEL1, SEL0 settings to select the configuration stored in OTP. Four configurations can be stored in OTP. These can be factory programmed or user programmed. At power up time, the SEL0 and SEL1 pins must be tied to either the VDDD/VDDA power supply so that they ramp with that supply or are tied low (this is the same as floating the pins). This will cause the register configuration to be loaded that is selected according to Table 3 above. Providing that OUT0_SEL_I2CB was 1 at POR and OTP register 0:7=0, after the first 10mS of operation the levels of the SELx pins can be changed, either to low or to the same level as VDDD/VDDA. The SELx pins must be driven with a digital signal of < 300nS Rise/Fall time and only a single pin can be changed at a time. After a pin level change, the device must not be interrupted for at least 1ms so that the new values have time to load and take effect. If OUT0_SEL_I2CB was 0 at POR, alternate configurations can only be loaded via the I2C interface. Table 4: Input Clock Select Input clock select. Selects the active input reference source in manual switchover mode. 0 = Integrated XTAL (default) 1 = CLKIN, CLKINB CLKSEL Polarity can be changed by I2C programming as shown in the table below. PRIMSRC is bit 1 of Register 0x13. Reference Clock Input Pins and Selection The 5P49V5935 by default uses an integrated 25MHz crystal as input reference. It also has a redundant external clock input. A glitchless manual switchover functions allows selection of either one as mentioned above as input reference during normal operation. Either clock input can be set as the primary clock. The primary clock designation is to establish which is the main reference clock to the PLL. The non-primary clock is designated as the secondary clock in case the primary clock goes absent and a backup is needed. The PRIMSRC bit determines which clock input will be selected as primary clock. When PRIMSRC bit is “0”, integrated crystal is selected as the primary clock, and when “1”, (CLKIN, CLKINB) as the primary clock. The two reference inputs can be manually selected using the CLKSEL pin. The SM bits must be set to “0x” for manual switchover which is detailed in Manual Switchover Mode section. Manual Switchover Mode When SM[1:0] is “0x”, the redundant inputs are in manual switchover mode. In this mode, CLKSEL pin is used to switch between the primary and secondary clock sources. The primary and secondary clock source setting is determined by the PRIMSRC bit. During the switchover, no glitches will occur at the output of the device, although there may be frequency and phase drift, depending on the exact phase and frequency relationship between the primary and secondary clocks. Input Reference Frequency–Fref (MHz) Loop Bandwidth Min (kHz) Loop Bandwidth Max (kHz) 1 40 126 350 300 1000 OUT0_SEL_I2CB @ POR SEL1 SEL0 I2C Access REG0:7 Config 10 0 No 0 0 10 1 No 0 1 11 0 No 0 2 11 1 No 0 3 0 X X Yes 1 I2C defaults 0X X Yes 0 0 PRIMSRC CLKSEL Source 0 0 Integrated XTAL 0 1 CLKIN, CLKINB 1 0 CLKIN, CLKINB 1 1 Integrated XTAL |
Similar Part No. - 5P49V5935_16 |
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Similar Description - 5P49V5935_16 |
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