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IS41C16257-35KI Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS41C16257-35KI Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 17 page ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc. FEATURES • Fast access and cycle time • TTL compatible inputs and outputs • Refresh Interval: 512 cycles/8 ms • Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden • JEDEC standard pinout • Single power supply: -- 5V ± 10% (IS41C16257) -- 3.3V ± 10% (IS41LV16257) • Byte Write and Byte Read operation via two CAS • Industrial temperature available DESCRIPTION The ISSI IS41C16257 and the IS41LV16257 are 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memories. Fast Page Mode allows 512 random accesses within a single row with access cycle time as short as 12 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes these devices ideal for use in 16- and 32-bit wide data bus systems. These features make the IS41C16257 and the IS41LV16257 ideally suited for high band-width graphics, digital signal processing, high-performance computing systems, and peripheral applications. The IS41C16257 and the IS41LV16257 are packaged in a 40-pin, 400-mil SOJ and TSOP (Type II). IS41C16257 IS41LV16257 256K x 16 (4-MBIT) DYNAMIC RAM WITH FAST PAGE MODE MAY 1999 Integrated Silicon Solution, Inc. — 1-800-379-4774 1 DR004-1B 05/24/99 KEY TIMING PARAMETERS Parameter -35 -60 Unit Max. RAS Access Time (tRAC)35 60 ns Max. CAS Access Time (tCAC)10 15 ns Max. Column Address Access Time (tAA)18 30 ns Min. Fast Page Mode Cycle Time (tPC)12 25 ns Min. Read/Write Cycle Time (tRC) 60 110 ns ISSI® |
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