7/21

TSZ02201-0A0A2D300090-1-2

08.Sep.2015 Rev.004

www.rohm.com

© 2013 ROHM Co., Ltd. All rights reserved.

TSZ22111･15･001

BU97950FUV

MAX 280 segments (SEG35×COM8)

○

Command transfer method

Send the Slave Address (“01111100” for Write Mode or “01111101” for Read Mode) after the “START condition” is

generated. Command input follows after the Slave Address. The least significant bit (LSB) of the Slave Address

determines if the operation is Write or Read.

The MSB is the command/data judgment bit. This bit determines whether succeeding byte is a command or data.

When “command or data judgment bit”=„1‟, the next byte is a command.

When “command or data judgment bit”=„0‟, the next byte is display data.

Slave address

A 1

S

Command

A 1 Command

A 1 Command

A 0 Command

A

… P

Display Data

Once the chip is in display data transfer condition, command can no longer be accepted.

To input another command, a “START condition” must be generated.

If “START condition” or “STOP condition” is inputted during command transmission, the current command will be cancelled.

If the Slave address is continuously inputted after the “START condition”, it will be in command input condition.

After “START condition” please input “Slave Address”. When Slave Address is not recognized, Acknowledge bit will not be

returned and succeeding transmissions will be invalid. During an invalid state, sending the “START condition” will cause

the device to return to a valid status.

＊

When transferring command and data, please observe “MPU Interface characteristic” of input rise time, Setup time, and

Hold time etc…（Refer to MPU Interface）.

○

Write display and transfer method

BU97950 enters “Write mode” when R/W bit of Slave address is „0‟

BU97950 has Display Data RAM (DDRAM) of 35×8=280bits.

The relationship between data input and display data, DDRAM data and address are as follows.

0111110

A 0

S

0000000

A a b c d e f g h A

i j k l m n o p A … P

Display Data

Slave address

Command

0

R/W=0 (Write Mode)

The 8-bit display data will be stored in the DDRAM. The address to be written is specified by Address Set command, and

the address is automatically incremented after every 8-bit of data.

Data can be continuously written in the DDRAM by transmitting Data continuously.

0

1

2

3

4

5

6

7

・・・・・・・・

21h

22h

BIT

0

a

i

COM0

1

b

j

COM1

2

c

k

COM2

3

d

l

COM3

4

e

m

COM4

5

f

n

COM5

6

g

o

COM6

7

h

p

COM7

SEG0

SEG1

SEG2

SEG3

SEG4

SEG5

SEG6

SEG7

SEG33

SEG34

DDRAM address