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5962-8863404ZX Datasheet(PDF) 1 Page - ATMEL Corporation |
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5962-8863404ZX Datasheet(HTML) 1 Page - ATMEL Corporation |
1 / 16 page 1 Features • Fast Read Access Time - 70 ns • Automatic Page Write Operation – Internal Address and Data Latches for 64 Bytes – Internal Control Timer • Fast Write Cycle Times – Page Write Cycle Time: 3 ms or 10 ms Maximum – 1 to 64-Byte Page Write Operation • Low Power Dissipation – 80 mA Active Current – 3 mA Standby Current • Hardware and Software Data Protection • DATA Polling for End of Write Detection • High Reliability CMOS Technology – Endurance: 10 4 or 105 Cycles – Data Retention: 10 Years • Single 5V ± 10% Supply • CMOS and TTL Compatible Inputs and Outputs • JEDEC Approved Byte-Wide Pinout • Full Military, Commercial, and Industrial Temperature Ranges Description The AT28HC256 is a high-performance Electrically Erasable and Programmable Read Only Memory. Its 256K of memory is organized as 32,768 words by 8 bits. Man- ufactured with Atmel’s advanced nonvolatile CMOS technology, the AT28HC256 256 (32K x 8) High Speed Parallel EEPROMs AT28HC256 Rev. 0007G–10/98 Pin Configurations Pin Name Function A0 - A14 Addresses CE Chip Enable OE Output Enable WE Write Enable I/O0 - I/O7 Data Inputs/Outputs NC No Connect DC Don’t Connect TSOP Top View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 LCC, PLCC Top View Note: PLCC package pins 1 and 17 are DON’T CONNECT. 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 A6 A5 A4 A3 A2 A1 A0 NC I/O0 A8 A9 A11 NC OE A10 CE I/O7 I/O6 PGA Top View (continued) CERDIP, PDIP, FLATPACK Top View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 |
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