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BD8256EFV-M Datasheet(PDF) 10 Page - Rohm |
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BD8256EFV-M Datasheet(HTML) 10 Page - Rohm |
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10 / 53 page  10/49 TSZ02201-0G1G0BK00030-1-2 © 2013 ROHM Co., Ltd. All rights reserved. 4.Apr.2016 Rev.004 www.rohm.com TSZ22111・15・001 BD8256EFV-M ◆ Control register 1. Input / Output Sequence When writing data to the control register, enter the register address in the first 7 bits of the SDI input, then set the 1bit R/W to 0 and enter the data of each setting in the last 8 bits. SDO is Hi-Z when R/W=0. When reading data from the control register, enter the register address in the first 7 bits of the SDI input, then set the 1 bit R/W to 1. The last 8 bits are ignored. When R/W=1, 8-bit data of specified address is output to the SDO. SLV SCLK SDO Hi-Z SDI A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 R/W A6 A5 Figure 7. Control Register 8 bit Write Sequence (A6, A5=1,1, R/W= 0) SLV SCLK Hi-Z D6 D5 D4 D3 D2 D1 D0 D7 SDO SDI A4 A3 A2 A1 A0 R/W A6 A5 Figure 8. Control Register 8 bit Read Sequence (A6, A5=1,1, R/W= 1) 2. Address Map Control Register Address Map REG NAME R/W D7 D6 D5 D4 D3 D2 D1 D0 70h OUTPUT _EN1 R/W FCTL1 _OUTEN FCTL2 _OUTEN TK _OUTEN SL _OUTEN SA _OUTEN SP _OUTEN LD _OUTEN N/A 71h - - - - - - - - - - 72h POWER _SAVE1 R/W FCTL1 _PSB FCTL2 _PSB TK _PSB SL _PSB SA _PSB SP _PSB LD _PSB N/A 73h - - - - - - - - - - 74h DRIVER _SET R/W N/A SP _BRAKE GAIN _SELFCTL GAIN _SELTK DIFF _FCTL LD _BRAKE GAIN _SELLD N/A 75h RESET W RST _DAC RST _CTLREG RST _PKTERR RST _PKTSTOP RST _OCP RST _SHORT N/A N/A 76h PKT _TIME R/W N/A N/A PKTSTOP _TIME1 PKTSTOP _TIME0 N/A N/A N/A N/A 77h STATUS _FLAG1 R ALL _ERR OCP _FCTL OCP _TK SHORT _LD TSD PKT _ERR PKT _STOP UVLO _VCC 78h TEST0 R/W Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved 79h TEST1 R/W Reserved Reserved Reserved Reserved Reserved N/A N/A N/A 7Ah TEST2 R/W N/A N/A Reserved N/A Reserved Reserved Reserved N/A 7Bh RST _CHECK R/W RST _CHECKA RST _CHECKB N/A N/A N/A N/A N/A N/A 7Ch - - - - - - - - - - 7Dh - - - - - - - - - - 7Eh - - - - - - - - - - 7Fh - - - - - - - - - - Write access to "Reserved" bits should be made by "0" input. Read access to "N/A" bits will return "0". |
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