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MC74HC541ADTG Datasheet(PDF) 5 Page - ON Semiconductor |
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MC74HC541ADTG Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 7 page MC74HC541A http://onsemi.com 5 PIN DESCRIPTIONS INPUTS A1, A2, A3, A4, A5, A6, A7, A8 (PINS 2, 3, 4, 5, 6, 7, 8, 9) Data input pins. Data on these pins appear in non−inverted form on the corresponding Y outputs, when the outputs are enabled. CONTROLS OE1, OE2 (PINS 1, 19) Output enables (active−low). When a low voltage is applied to both of these pins, the outputs are enabled and the device functions as an non−inverting buffer. When a high voltage is applied to either input, the outputs assume the high impedance state. OUTPUTS Y1, Y2, Y3, Y4, Y5, Y6, Y7, Y8 (PINS 18, 17, 16, 15, 14, 13, 12, 11) Device outputs. Depending upon the state of the output enable pins, these outputs are either non−inverting outputs or high−impedance outputs. VCC To 7 Other Buffers Figure 6. Logic Detail One of Eight Buffers INPUT A OE1 OE2 OUTPUT Y ORDERING INFORMATION Device Package Shipping† MC74HC541ADWG SOIC−20 WIDE (Pb−Free) 38 Units / Rail MC74HC541ADWR2G SOIC−20 WIDE (Pb−Free) 1000 Tape & Reel NLV74HC541ADWR2G* SOIC−20 WIDE (Pb−Free) 1000 Tape & Reel MC74HC541ADTG TSSOP−20 (Pb−Free) 75 Units / Rail MC74HC541ADTR2G TSSOP−20 (Pb−Free) 2500 Tape & Reel NLV74HC541ADTR2G* TSSOP−20 (Pb−Free) 2500 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. |
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