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MC74HC541A Datasheet(PDF) 1 Page - ON Semiconductor

Part # MC74HC541A
Description  Octal 3-State Noninverting Buffer/Line Driver/Line Receiver
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC74HC541A Datasheet(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 9
1
Publication Order Number:
MC74HC541A/D
MC74HC541A
Octal 3-State Noninverting
Buffer/Line Driver/Line
Receiver
High−Performance Silicon−Gate CMOS
The MC74HC541A is identical in pinout to the LS541. The device
inputs are compatible with Standard CMOS outputs. External pull−up
resistors make them compatible with LSTTL outputs.
The HC541A is an octal noninverting buffer/line driver/line
receiver designed to be used with 3−state memory address drivers,
clock drivers, and other bus−oriented systems. This device features
inputs and outputs on opposite sides of the package and two ANDed
active−low output enables.
The HC541A is similar in function to the HC540A, which has
inverting outputs.
Features
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With the JEDEC Standard No. 7 A Requirements
Chip Complexity: 134 FETs or 33.5 Equivalent Gates
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
18
Y1
2
A1
17
Y2
3
A2
16
Y3
4
A3
15
Y4
5
A4
14
Y5
6
A5
13
Y6
7
A6
12
Y7
8
A7
11
Y8
9
A8
OE1
OE2
1
19
Output
Enables
Data
Inputs
Noninverting
Outputs
PIN 20 = VCC
PIN 10 = GND
Figure 1. Logic Diagram
http://onsemi.com
1
20
MARKING DIAGRAMS
SOIC−20
HC541A
AWLYYWWG
HC
541A
ALYW
G
G
TSSOP−20
20
1
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W
= Work Week
G or
G
= Pb−Free Package
(Note: Microdot may be in either location)
L
L
H
X
L
L
X
H
L
H
X
X
Inputs
Output Y
OE1
OE2
A
L
H
Z
Z
X = Don’t Care
Z = High Impedance
FUNCTION TABLE
SOIC−20
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
PIN ASSIGNMENT
19
20
18
17
16
15
14
2
1
345
67
VCC
13
8
12
9
11
10
OE2 Y1
Y2 Y3
Y4
Y5
Y6
Y7
Y8
OE1 A1
A2
A3 A4
A5
A6
A7
A8 GND


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