Micrel, Inc.

MIC59P50

July 29, 2015

3

Revision 2.0

Ordering Information

Part Number

Temperature Range

Package

Pb-Free

MIC59P50YN

–40°C to +85°C

24-Pin Plastic DIP

(1)

√

MIC59P50YV

–40°C to +85°C

28-Pin PLCC

√

MIC59P50YWM

–40°C to +85°C

24-Pin Wide SOIC

√

Note:

1.

300mm “Skinny DIP”

Pin Configuration

24-Pin PDIP (N)

24-Pin Wide SOIC (WM)

(Top View)

28-Pin PLCC (V)

(Top View)

Pin Description

Pin Number

PDIP & SOIC

Pin Number

PLCC

Pin Name

Pin Name

1

2

/FLAG

Error flag. Open-collector output is low upon overcurrent fault or

overtemperature fault. /OE/RESET must be pulled high to reset the flag and

fault condition.

2

3

CLEAR

Sets all latches to OFF (open).

3

4

STROBE

Input strobe pin. Loads output latches when high.

4-11

5-12

Parallel inputs, 1 through 8.

12

15

VEE

Output ground (substrate). Most negative voltage in the system connects here.

13

17

COMMON

Transient suppression diodes cathode common pin.

14-21

18-25

Parallel outputs, 8 through 1.

22

26

VDD

Logic positive supply voltage.

23

27

/OE/RESET

Output enable reset. When low, outputs are active. When high, outputs are

inactive and the flag and outputs are reset from a fault condition. An

undervoltage condition emulates a high /OE input.

24

28

VSS

Logic reference (ground) pin.