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SPD02N80C3 Datasheet(PDF) 3 Page - Infineon Technologies AG |
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SPD02N80C3 Datasheet(HTML) 3 Page - Infineon Technologies AG |
3 / 10 page SPD02N80C3 Parameter Symbol Conditions Unit min. typ. max. Dynamic characteristics Input capacitance C iss - 290 - pF Output capacitance C oss - 13 - Effective output capacitance, energy related 6) C o(er) - 11 - Effective output capacitance, time related 7) C o(tr) - 26 - Turn-on delay time t d(on) - 25 - ns Rise time t r - 15 - Turn-off delay time t d(off) - 72 - Fall time t f - 18 - Gate Charge Characteristics Gate to source charge Q gs - 1.5 - nC Gate to drain charge Q gd - 6 - Gate charge total Q g - 12 16 Gate plateau voltage V plateau - 5.5 - V Reverse Diode Diode forward voltage V SD V GS=0 V, I F=I S=2 A, T j=25 °C - 1 1.2 V Reverse recovery time t rr - 520 - ns Reverse recovery charge Q rr - 2 - µC Peak reverse recovery current I rrm - 6 - A 6) C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS. 7) C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. Values V GS=0 V, V DS=100 V, f =1 MHz V DD=400 V, V GS=0/10 V, I D=2 A, R G=47 ? , T j=25 °C V DD=640 V, I D=2 A, V GS=0 to 10 V V GS=0 V, V DS=0 V to 480 V 5) Device on 40mm*40mm*1.5 epoxy PCB FR4 with 6cm² (one layer, 70µm thick) copper area for drain connection. PCB is vertical without blown air V R=400 V, I F=I S=2 A, di F/dt =100 A/µs 3) Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f. 4) I SD=ID, di/dt=400A/µs, VDClink = 400V, Vpeak<V(BR)DSS, Tj<Tjmax , identical low side and high side switch 2) Pulse width t p limited by T j,max 1) J-STD20 and JESD22 Rev. 2.91 page 3 2011-09-28 2.92 2013-07-31 |
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