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Datasheet

Datasheet

BM6213FS

TSZ02201-0828AB400400-1-2

© 2016 ROHM Co., Ltd. All rights reserved.

27.Jun.2016 Rev.001

http://www.rohm.com

TSZ22111 · 15 · 001

7. Output Duty Pulse Width Limiter

Pulse width duty is controlled during PWM switching in order to ensure the operation of internal power transistor. The

or more. Dead time is forcibly provided to prevent internal power transistors to turn-on simultaneously in upper and lower

1.6µs minimum). Because of this, the maximum duty of the synchronous switching mode is 84% (typical).

8. PWM Switching Arm Setting

The PWM switching arm can choose one from the synchronous switching or the upper switching. When PC is “L”, the

switching mode is the synchronous. And also when PC is “H”, the switching mode is the upper switching. However, when

the hall cycle is about 1.4-Hz or less, the switching mode keeps the synchronous even if PC is “H”. When the PWM

control is entering to the testing mode, the controller forces PC pin voltage to ground and synchronous switching mode.

Therefore, when PC pin pull-up to VREG pin, at least a resistor with a value 10k Ω or more. The VSP offset voltage

(Figure 32) is buffered to PCT pin, to connect an external resistor between PCT pin and ground. The internal bias current

determine the slope by the resistance ratio of PC pin and PCT pin, which allows you to adjust the voltage command

the range on the basis of 100 kΩ, because the PCT pin current capability is a 100 µA or less.

Figure 4. PWM Switching Arm Setting

9. Current Limiter (CL) Circuit and Overcurrent Protection (OCP) Circuit

The current limiter circuit can be activated by connecting a low value resistor for current detection between the output

stage ground (PGND) and the controller ground (GND). When the SNS pin voltage reaches or surpasses the threshold

initiating the current limiter operation. When the SNS pin voltage swings below the ground, it is recommended to insert a

resistor - 1.5 kΩ or more - between SNS pin and PGND pin to prevent malfunction. Since this limiter circuit is not a latch

type, it returns to normal operation - synchronizing with the carrier frequency - once the SNS pin voltage falls below the

threshold voltage. A filter is built into the overcurrent detection circuit to prevent malfunctions, and does not activate when

the short circuit except the ground fault, the gate driver outputs low to the gate of all output MOSFETs, thus initiating the

overcurrent protection operation. Since this protection circuit is also not a latch type, it returns to normal operation

synchronizing with the carrier frequency.

PC

PCT

VSP

Upper SW

or

Upper/Lower SW

VSP

Upper/Lower

SW

Upper

SW

PC: H

PC: L