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9DBL0242BKILF Datasheet(PDF) 6 Page - Integrated Device Technology |
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9DBL0242BKILF Datasheet(HTML) 6 Page - Integrated Device Technology |
6 / 19 page 2-OUTPUT 3.3V PCIE ZERO-DELAY BUFFER 6 OCTOBER 6, 2016 9DBL02 DATASHEET Electrical Characteristics–Input/Supply/Common Parameters–Normal Operating Conditions TA = TAMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Supply Voltage VDDx Supply voltage for core and analog 3.135 3.3 3.465 V Ambient Operating Temperature TAMB Industrial range -40 25 85 °C Input High Voltage VIH 0.75 VDDx VDDx + 0.3 V Input Low Voltage VIL -0.3 0.25 VDDx V Input High Voltage VIHtri 0.75 VDDx VDD + 0.3 V Input Mid Voltage VIMtri 0.4 VDDx 0.5 VDDx 0.6 VDDx V Input Low Voltage VILtri -0.3 0.25 VDDx V IIN Single-ended inputs, VIN = GND, VIN = VDD -5 5 uA IINP Single-ended inputs VIN = 0 V; Inputs with internal pull-up resistors VIN = VDD; Inputs with internal pull-down resistors -50 50 uA Bypass mode 1 200 MHz 2 100MHz PLL mode 60 100.00 140 MHz 2 50MHz PLL mode 30 50.00 65 MHz 2 125MHz PLL mode 75 125.00 175 MHz 2 Pin Inductance Lpin 7nH 1 CIN Logic Inputs, except DIF_IN 1.5 5 pF 1 CINDIF_IN DIF_IN differential clock inputs 1.5 2.7 pF 1 COUT Output pin capacitance 6 pF 1 Clk Stabilization TSTAB From VDD Power-Up and after input clock stabilization or de-assertion of PD# to 1st clock 1ms 1,2 Input SS Modulation Frequency PCIe fMODINPCIe Allowable Frequency for PCIe Applications (Triangular Modulation) 30 33 kHz Input SS Modulation Frequency non-PCIe fMODIN Allowable Frequency for non-PCIe Applications (Triangular Modulation) 066 kHz OE# Latency tLATOE# DIF start after OE# assertion DIF stop after OE# deassertion 1 3 clocks 1,3 Tdrive_PD# tDRVPD DIF output enable after PD# de-assertion 300 us 1,3 Tfall tF Fall time of single-ended control inputs 5 ns 2 Trise tR Rise time of single-ended control inputs 5 ns 2 1Guaranteed by design and characterization, not 100% tested in production. 2Control input must be monotonic from 20% to 80% of input swing. 3Time from deassertion until outputs are >200 mV Capacitance Input Frequency FIN Input Current Single-ended inputs, except SMBus Single-ended tri-level inputs ('_tri' suffix) |
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