2-OUTPUT 3.3V PCIE ZERO-DELAY BUFFER

4

OCTOBER 6, 2016

9DBL02 DATASHEET

Test Loads

Alternate Terminations

The 9DBL family can easily drive LVPECL, LVDS, and CML logic. See “AN-891 Driving LVPECL, LVDS, and CML Logic with

IDT's "Universal" Low-Power HCSL Outputs” for details.

Terminations

Device

Zo (Ω)Rs (Ω)

9DBL0242

100

None needed

9DBL0252

100

7.5

9DBL02P2

100

Prog.

9DBL0242

85

N/A

9DBL0252

85

None needed

9DBL02P2

85

Prog.

Rs

Rs

Low-Power Differential Output Test Load

2pF

2pF

5 inches

Zo=100ohm

Note: The device can drive transmission line lengths greater

than those specified by the PCIe SIG