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BCM20733 Datasheet(PDF) 9 Page - Cypress Semiconductor |
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BCM20733 Datasheet(HTML) 9 Page - Cypress Semiconductor |
9 / 67 page Document No. 002-14859 Rev. *R Page 9 of 67 CYW20733 1.5 PCM Interface The CYW20733 PCM interface can connect to linear PCM codec devices in master or slave mode. In master mode, the device generates the PCM_BCLK and PCM_SYNC signals. In slave mode, these signals are provided by another master on the PCM interface as inputs to the device. The channels can be configured to either transmit or receive, but they must be assigned to different time slots. The two half-duplex channels cannot be combined to form a single full-duplex channel. 1.5.1 System Diagram Figure 3 shows options for connecting the device to a PCM codec device as a master or a slave. Figure 3. PCM Interface with Linear PCM Codec Table 3. CYW20733 Peripheral UART Pin Name pUART_TX pUART_RX pUART_CTS_N pUART_RTS_N Configured pin name P0 P2 P3 P1 P5 P4 P7 P6 P24 P25 P35 P30 P31 P33 – – P32 P34 – – PCM Interface Slave Mode PCM Codec (Master) CYW20733 (Slave) PCM_IN PCM_BCLK PCM_SYNC PCM_OUT PCM Interface Master Mode PCM Codec (Slave) CYW20733 (Master) PCM_IN PCM_BCLK PCM_SYNC PCM_OUT PCM Interface Hybrid Mode PCM Codec (Hybrid) CYW20733 (Hybrid) PCM_IN PCM_BCLK PCM_SYNC PCM_OUT |
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