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XC835MT Datasheet(PDF) 7 Page - Infineon Technologies AG |
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XC835MT Datasheet(HTML) 7 Page - Infineon Technologies AG |
7 / 57 page XC835/836 Summary of Features Data Sheet 1 V1.4, 2011-10 1 Summary of Features The XC835/836 has the following features: • High-performance XC800 Core – compatible with standard 8051 processor – two clocks per machine cycle architecture (for memory access without wait state) – two data pointers • On-chip memory – 8 Kbytes of Boot ROM, Library ROM and User routines – 256 bytes of RAM – 256 bytes of XRAM – 4/8 Kbytes of Flash (includes memory protection strategy) • I/O port supply at 2.5 V - 5.5 V and core logic supply at 2.5 V (generated by embedded voltage regulator) Figure 1 XC835/836 Functional Units • Power-on reset generation • Brownout detection for IO supply and core logic supply • 48 MHz on-chip OSC for clock generation – Loss-of-Clock detection (more features on next page) Port 0 Port 1 Port 2 XC800 Core UART ADC 10-bit 8-channel Boot ROM 8K Bytes XRAM 256 Bytes RAM 256 Bytes On-Chip Debug Support Timer 0 16-bit Timer 1 16-bit Timer 2 16-bit Watchdog Timer SSC 8/4K Bytes Flash Capture/Compare Unit 16-bit Compare Unit 16-bit 8-bit Digital I/O 6-bit Digital I/O 8-bit Digital/ Analog Input IIC MDU LED and Touch Sense Controller Real-Time Clock Port 3 CORDIC 3-bit Digital I/O |
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