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P3P25814AG-08CR Datasheet(PDF) 3 Page - ON Semiconductor

Part # P3P25814AG-08CR
Description  Spread Spectrum Clock Generator
Download  9 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

P3P25814AG-08CR Datasheet(HTML) 3 Page - ON Semiconductor

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PCS3P25811, PCS3P25812, PCS3P25814
www.onsemi.com
3
Table 3. OUTPUT FREQUENCY DEVIATION SELECTION
CLKIN (MHz)
FSEL
S1 = 0
S0 = 0
S1 = 0
S0 = M
S1 = 0
S0 = 1
S1 = M
S0 = 0
S1 = 1
S0 = 1
S1 = 1
S0 = 0
S1 = M
S0 = 1
S1 = 1
S0 = M
S1 = M
S0 = M
Center
Center
Center
Center
Down
Down
Down
Down
No Spread
4 − 5
0
±1.4
±1.2
±0.6
±0.5
−3
−2.2
−1.9
−0.7
0
5 − 6
0
±1.3
±1.1
±0.5
±0.4
−2.7
−1.9
−1.7
−0.6
0
6 − 7
0
±1.2
±0.9
±0.5
±0.4
−2.5
−1.8
−1.5
−0.6
0
7 − 8
0
±1.1
±0.9
±0.4
±0.3
−2.3
−1.7
−1.4
−0.5
0
8 − 10
1
±1.4
±1.2
±0.6
±0.5
−3
−2.2
−1.9
−0.7
0
10 − 12
1
±1.3
±1.1
±0.5
±0.4
−2.7
−1.9
−1.7
−0.6
0
12 − 14
1
±1.2
±0.9
±0.5
±0.4
−2.5
−1.8
−1.5
−0.6
0
14 − 16
1
±1.1
±0.9
±0.4
±0.3
−2.3
−1.7
−1.4
−0.5
0
16 − 20
M
±1.4
±1.2
±0.6
±0.5
−3
−2.2
−1.9
−0.7
0
20 − 24
M
±1.3
±1.1
±0.5
±0.4
−2.7
−1.9
−1.7
−0.6
0
24 − 28
M
±1.2
±0.9
±0.5
±0.4
−2.5
−1.8
−1.5
−0.6
0
28 − 32
M
±1.1
±0.9
±0.4
±0.3
−2.3
−1.7
−1.4
−0.5
0
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
3 Level Digital Logic
S0, S1, and FSEL digital inputs are designed to sense 3
different logic levels designated as High “1”, Low “0” and
Middle “M”. With this 3−Level digital input logic 9 different
logic states can be detected.
S0, S1 and FSEL pins include an on chip 100 K (50 K /
50 K) resistor divider. No external application resistors are
needed to implement the 3−Level logic levels as shown in
table on the right:
Logic
Control Pins
1
FSEL, S0, S1 to VDD
M
FSEL, S0, S1
UNCONNECTED
0
FSEL, S0, S1 to VSS
VDD
VSS
Table 4. OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VDD, VIN
Voltage on any pin with respect to VSS
2.8
3.6
V
TA
Operating temperature
0
+70
°C
CL
Load Capacitance
15
pF
CIN
Input Capacitance
7
pF
Table 5. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Rating
Unit
VDD, VIN
Voltage on any pin with respect to Ground
−0.5 to +4.6
V
TSTG
Storage temperature
−65 to +125
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
TDV
Static Discharge Voltage (As per JEDEC STD 22− A114−B)
2
KV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.


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