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NB2309AI1HDTR2G Datasheet(PDF) 3 Page - ON Semiconductor |
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NB2309AI1HDTR2G Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 9 page NB2309A www.onsemi.com 3 Figure 2. Pin Configuration VDD 1 2 3 4 16 15 14 13 REF CLKA1 CLKA2 GND CLKOUT CLKA4 CLKA3 NB2309A VDD 5 6 7 8 12 11 10 9 CLKB1 CLKB2 S2 CLKB4 CLKB3 S1 GND Table 2. PIN DESCRIPTION Pin # Pin Name Description 1 REF (Note 2) Input reference frequency, 5 V tolerant input. 2 CLKA1 (Note 3) Buffered clock output, Bank A. 3 CLKA2 (Note 3) Buffered clock output, Bank A. 4 VDD 3.3 V supply. 5 GND Ground. 6 CLKB1 (Note 3) Buffered clock output, Bank B. 7 CLKB2 (Note 3) Buffered clock output, Bank B. 8 S2 (Note 4) Select input, bit 2. 9 S1 (Note 4) Select input, bit 1. 10 CLKB3 (Note 3) Buffered clock output, Bank B. 11 CLKB4 (Note 3) Buffered clock output, Bank B. 12 GND Ground. 13 VDD 3.3 V supply. 14 CLKA3 (Note 3) Buffered clock output, Bank A. 15 CLKA4 (Note 3) Buffered clock output, Bank A. 16 CLKOUT (Note 3) Buffered output, internal feedback on this pin. 2. Weak pulldown. 3. Weak pulldown on all outputs. 4. Weak pullup on these inputs. |
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