Rev 1.4

vicorpower.com

Page 10 of 41

09/2016

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BCM4414xD1E5135yzz

Signal Characteristics

Specifications apply over all line and load conditions, unless otherwise noted;

boldface specifications apply over the temperature range of

number 42550 will be needed for applications requiring the use of the signal pins. Signal cable 42550 is rated up to five insertions and extractions.

To avoid unnecessary stress on the connector, the cable should be tied to the chassis.

EXT. BIAS (VDDB) Pin

• 5V supply input, required to power the circuitry internal to the BCM in a VIA package for communication signals such as SCL, SDA, ADDR etc

• Voltage to EXT BIAS pin is needed for PMBus™ enable and disable control. It is not needed for PMBus monitoring voltage, current, power or temperature.

Lower voltage is better. It will help to lower the power dissapation in the internal regulator that is generating 3.3V voltage for communication circuits.

• Apply voltage to this pin between 4.5V and 9V. The nominal voltage is 5V.

SIGNAL TYPE

STATE

ATTRIBUTE

SYMBOL

CONDITIONS / NOTES

MIN

TYP

MAX UNIT

INPUT

Regular

Operation

VDDB Voltage

4.5

5

9

V

VDDB Current consumption

50

mA

Startup

Inrush Current Peak

3.5

A

Turn on time

1.5

ms

SGND Pin

• This pin is supply return pin for Ext. Bias (VDDB) pin.

• All input and output signals (SCL, SDA, ADDR) are referenced to SGND pin.

Address (ADDR) Pin

• This pin programs only a Fixed and Persistent slave address for BCM in a VIA package.

• This pin programs the address using a resistor between ADDR pin and signal ground.

• The address is sampled during startup and is used until power is reset.

• This pin has 10 kΩ pullup resistor internally between ADDR pin and internal VDD.

SIGNAL TYPE

STATE

ATTRIBUTE

SYMBOL

CONDITIONS / NOTES

MIN

TYP

MAX UNIT

MULTI

‐LEVEL

INPUT

Regular

Operation

ADDR Input Voltage

See address section

0

3.3

V

ADDR leakage current

Leakage current

1

µA

Startup

ADDR registration time

1

ms

Note: Keep SGND signal of the BCM in a VIA package separated from the low voltage side power return terminal (–LO) in electrical design.