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NB100LVEP56 Datasheet(PDF) 2 Page - ON Semiconductor

Part # NB100LVEP56
Description  2.5V / 3.3V ECL DUAL Differential 2:1 Multiplexer
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NB100LVEP56 Datasheet(HTML) 2 Page - ON Semiconductor

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NB100LVEP56
www.onsemi.com
2
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
Name
I/O
Default
State
Description
TSSOP
QFN
14,20
3,9,18,19,
20
VCC
Positive Supply Voltage. All VCC Pins must be Externally
Connected to Power Supply to Guarantee Proper Operation.
11
15,24
VEE
Negative Supply Voltage. All VEE Pins must be Externally
Connected to Power Supply to Guarantee Proper Operation.
3,8
6,12
VBB0,
VBB1
ECL Reference Voltage Output
1
4
D0a
ECL Input
Low
Noninverted Differential Data a Input to MUX 0. Internal 75 k
W to
VEE.
2
5
D0a
ECL Input
High
Inverted Differential Data a Input to MUX 0. Internal 75 k
W to VEE
and 37 k
W to VCC.
4
7
D0b
ECL Input
Low
Noninverted Differential Data b Input to MUX 0. Internal 75 k
W to
VEE.
5
8
D0b
ECL Input
High
Inverted Differential Data b Input to MUX 0. Internal 75 k
W to VEE
and 37 k
W to VCC.
6
10
D1a
ECL Input
Low
Noninverted Differential Data a Input to MUX 1. Internal 75 k
W to
VEE.
7
11
D1a
ECL Input
High
Inverted Differential Data a Input to MUX 1. Internal 75 k
W to VEE
and 37 k
W to VCC.
9
13
D1b
ECL Input
Low
Noninverted Differential Data b Input to MUX 1. Internal 75 k
W to
VEE.
10
14
D1b
ECL Input
High
Inverted Differential Data b Input to MUX 1. Internal 75 k
W to VEE
and 37 k
W to VCC.
19
2
Q0
ECL Output
Noninverted Differential Output MUX 0. Typically Terminated with
50
W to VTT = VCC − 2.0 V.
18
1
Q0
ECL Output
Inverted Differential Output MUX 0. Typically Terminated with
50
W to VTT = VCC − 2.0 V.
13
17
Q1
ECL Output
Noninverted Differential Output MUX 1. Typically Terminated with
50
W to VTT = VCC − 2.0 V.
12
16
Q1
ECL Output
Inverted Differential Output MUX 1. Typically Terminated with
50
W to VTT = VCC − 2.0 V.
17
23
SEL0
ECL, CMOS
Input
Low
Noninverted Differential Select Input to MUX 0. Internal 75 k
W to
VEE.
16
22
COM_SEL
ECL, CMOS
Input
Low
Noninverted Differential Common Select Input to Both MUX.
Internal 75 k
W to VEE.
15
21
SEL1
ECL, CMOS
Input
Low
Noninverted Differential Select Input to MUX 1. Internal 75 k
W to
VEE.
N/A
EP
Exposed Pad. The exposed pad (EP) on the package bottom
must be attached to a heat−sinking conduit. The exposed pad
may only be electrically connected to VEE.


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