NB3N51032 datasheet(1/13 Pages) ONSEMI

Part #	NB3N51032

Description	Dual HCSL/LVDS Clock Generator

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Manufacturer	ONSEMI [ON Semiconductor]

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April, 2016 − Rev. 2

1

Publication Order Number:

NB3N51032/D

NB3N51032

3.3 V, Crystal to 25 MHz,

100 MHz, 125 MHz and

200 MHz Dual HCSL/LVDS

Clock Generator

The NB3N51032 is a precision, low phase noise clock generator that

supports PCI Express and Ethernet requirements. The device accepts a

25 MHz fundamental mode parallel resonant crystal and generates a

differential HCSL output at 25 MHz, 100 MHz, 125 MHz or 200 MHz

clock frequencies. Outputs can interface with LVDS with proper

termination (See Figure 10). The NB3N51032 provides selectable

spread options of −0.5% and −0.75% for applications demanding low

Electromagnetic Interference (EMI) as well as optimum performance

with no spread option.

Features

• Uses 25 MHz Fundamental Mode Parallel Resonant Crystal

• External Loop Filter is Not Required

• HCSL Differential Output or LVDS with Proper Termination

• Four Selectable Multipliers of the Input Frequency

• Output Enable with Tri−State Outputs

• PCIe Gen 1, Gen 2, Gen 3 Compliant

• Spread of −0.5%, −0.75% and No Spread

• Phase Noise: @ 100 MHz

Offset

Noise Power

100 Hz −88 dBc/Hz

1 kHz

−118 dBc/Hz

10 kHz −131 dBc/Hz

100 kHz −132 dBc/Hz

1 MHz −144 dBc/Hz

10 MHz −155 dBc/Hz

• Typical Period Jitter RMS of 1.5 ps

• Operating Supply Voltage Range 3.3 V ±5%

• Industrial Temperature Range −40°C to +85°C

• Functionally Compatible with IDT557−03,

IDT5V41065, IDT5V41235 with enhanced performance

• These are Pb−Free Devices

Applications

• Networking

• Consumer

• Computing and Peripherals

• Industrial Equipment

• PCIe Clock Generation Gen 1, Gen 2 and Gen 3

• Gigabit Ethernet

• FB DIMM

End Products

• Switch and Router

• Set Top Box, LCD TV

• Servers, Desktop Computers

• Automated Test Equipment

Figure 1. NB3N51032 Simplified Logic Diagram

Phase

Detector

Charge

Pump

HCSL

Output

BN

Clock Buffer

Crystal Oscillator

CLK0

X1/CLK

X2

VCO

25 MHz Clock or

Crystal

GND

VDD

S0

S1

OE

IREF

HCSL

Output

CLK1

SS0

SS1

Spread Spectrum

Circuit

VDD = VDDODA = VDDXD

GND = GNDODA = GNDXD

MARKING

DIAGRAM

TSSOP−16

DT SUFFIX

CASE 948F

www.onsemi.com

See detailed ordering and shipping information on page 11 of

this data sheet.

ORDERING INFORMATION

1

16

NB3N

1032

ALYW

G

1

16

A

= Assembly Location

L

= Wafer Lot

Y

= Year

W

= Work Week

G

= Pb−Free Package

(Note: Microdot may be in either location)

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