NB3N3002 datasheet(1/8 Pages) ONSEMI

Part #	NB3N3002

Description	HCSL Clock Generator

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Manufacturer	ONSEMI [ON Semiconductor]

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October, 2013 − Rev. 6

1

Publication Order Number:

NB3N3002/D

NB3N3002

3.3V, Crystal to 25MHz,

100MHz, 125MHz and

200MHz HCSL Clock

Generator

Description

The NB3N3002 is a precision, low phase noise clock generator that

supports PCI−Express and Ethernet requirements. The device accepts

a 25 MHz fundamental mode parallel resonant crystal and generates a

differential HCSL output at 25 MHz, 100 MHz, 125 MHz or 200 MHz

clock frequencies. Outputs can interface with LVDS with proper

termination (See Figure 5).

This device is housed in 5.0 mm x 4.4 mm narrow body TSSOP 16

pin package.

Features

• Uses 25 MHz Fundamental Mode Parallel Resonant Crystal

• External Loop Filter is Not Required

• HCSL Differential Output or LVDS with Proper Termination

• For Selectable Multipliers of the Input Frequency

• Output Enable with Tri−State Outputs

• PCIe Gen1, Gen2, Gen3 Jitter Compliant

• Typical TIE RMS jitter of 2.5 ps

• Phase Noise: @ 100 MHz

Offset

Noise Power

100 Hz

−109.4 dBc

1 kHz

−127.8 dBc

10 kHz

−136.2 dBc

100 kHz

−138.8 dBc

1 MHz

−138.2 dBc

10 MHz

−161.4 dBc

20 MHz

−163.00 dBc

• Operating Range 3.3 V ±5%

• Industrial Temperature Range −40°C to +85°C

• These are Pb−Free Devices

Figure 1. NB3N3002 Simplified Logic Diagram

Phase

Detector

Charge

Pump

HSCL

Output

BM

Clock Buffer

Crystal Oscillator

CLK

X1/CLK

X2

VCO

25 MHz Clock or

Crystal

GND

VDD

SEL0

SEL1

OE

IREF

MARKING

DIAGRAM

TSSOP−16

DT SUFFIX

CASE 948F

http://onsemi.com

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

ORDERING INFORMATION

1

16

A

= Assembly Location

L

= Wafer Lot

Y

= Year

W

= Work Week

G

= Pb−Free Package

NB3N

3002

ALYWG

G

1

16

(*Note: Microdot may be in either location)

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