NB3N201SDG datasheet(2/19 Pages) ONSEMI

Part #	NB3N201SDG

Description	3.3 V Differential Multipoint Low Voltage M-LVDS Driver Receiver

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Manufacturer	ONSEMI [ON Semiconductor]

Direct Link	http://www.onsemi.com

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NB3N201S, NB3N206S

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Figure 1. Logic Diagram

B

GND

VCC

DE

A

RE

D

R

1

2

3

4

8

7

6

5

NB3N201S, NB3N206S

SOIC−8

Figure 2. Pinout Diagram

(Top View)

Table 1. PIN DESCRIPTION

Number

Name

I/O Type

Open Default

Description

1

R

LVCMOS Output

Receiver Output Pin

2

RE

LVCMOS Input

High

Receiver Enable Input Pin (LOW = Active, HIGH = High Z

Output)

3

DE

LVCMOS Input

Low

Driver Enable Input Pin (LOW = High Z Output, HIGH=Active)

4

D

LVCMOS Input

Driver Input Pin

5

GND

Ground Supply pin. Pin must be connected to power supply to

guarantee proper operation.

6

A

M−LVDS Input

/Output

Transceiver True Input /Output Pin

7

B

M−LVDS Input

/Output

Transceiver Invert Input /Output Pin

8

VCC

Power Supply pin. Pin must be connected to power supply to

guarantee proper operation.

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