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IDT70V9269S6PRF Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT70V9269S6PRF Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 19 page 6.42 IDT70V9279/69S/L High-Speed 32/16K x 16 Dual-Port Synchronous Static RAM Industrial and Commercial Temperature Ranges 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 102 101 100 99 98 97 96 95 94 93 92 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 70 69 68 67 66 65 91 71 N/C N/C N/C A9R A8R A7R A6R A5R A4R A3R A2R A1R A0R N/C CNTENR CLKR ADSR VSS VDD N/C A0L A1L A2L A3L A4L A5L A6L A7L A8L A9L N/C N/C N/C N/C I/O10L I/O9L VDD N/C I/O8L N/C N/C VDD I/O7L I/O6L I/O5L I/O4L VSS I/O3L I/O2L VSS I/O1L I/O0L VDD VSS I/O0R I/O2R I/O1R VSS I/O4R I/O5R I/O6R VDD I/O7R N/C N/C I/O8R N/C VSS I/O9R I/O10R VDD I/O3R 70V9279/69PRF PK-128(5) 128-Pin TQFP Top View(6) 3743 drw 02 CNTENL CLKL ADSL N/C 01/15/04 Description: The IDT70V9279/69 is a high-speed 32/16K x 16 bit synchronous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allowsimultaneousaccessofanyaddressfrombothports.Registerson control,data,andaddressinputsprovideminimalsetupandholdtimes. The timing latitude provided by this approach allows systems to be designed with very short cycle times. Pin Configuration(2,3,4) NOTES: 1. A14X is a NC for IDT70V9269. 2. All VDD pins must be connected to power supply. 3. All VSS pins must be connected to ground. 4. Package body is approximately 14mm x 20mm x 1.4mm. 5. This package code is used to reference the package diagram. 6. This text does not indicate orientation of the actual part-marking. Withaninputdataregister,theIDT70V9279/69hasbeenoptimizedfor applicationshavingunidirectionalorbidirectionaldataflowinbursts.An automatic power down feature, controlled by CE0and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT’s CMOS high-performance technology, these devices typically operate on only 429mW of power. |
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