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TM4EP72CPN-60 Datasheet(PDF) 7 Page - Texas Instruments |
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TM4EP72CPN-60 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 22 page TM4EP64BJN, TM4EP64BPN, TM4EP64CJN, TM4EP64CPN 4194304 BY 64-BIT TM4EP72BJN, TM4EP72BPN, TM4EP72CJN, TM4EP72CPN 4194304 BY 72-BIT EXTENDED-DATA-OUT DYNAMIC RAM MODULES SMMS682A – AUGUST 1997– REVISED MARCH 1998 7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 electrical characteristics over recommended ranges of supply voltage and ambient temperature (unless otherwise noted) TM4EP64BxN PARAMETER TEST CONDITIONS† ’4EP64BxN-50 ’4EP64BxN-60 ’4EP64BxN-70 UNIT PARAMETER TEST CONDITIONS† MIN MAX MIN MAX MIN MAX UNIT VOH High-level output IOH = – 2 mA LVTTL 2.4 2.4 2.4 V VOH output voltage IOH = – 100 µA LVCMOS VDD– 0.2 VDD – 0.2 VDD – 0.2 V VOL Low-level output IOL = 2 mA LVTTL 0.4 0.4 0.4 V VOL output voltage IOL = 100 µA LVCMOS 0.2 0.2 0.2 V II Input current (leakage) VDD = 3.6 V, VI = 0 V to 3.9 V, All others = 0 V to VDD ± 20 ± 20 ± 20 µA IO Output current (leakage) VDD = 3.6 V, VO = 0 V to VDD, CASx high ± 20 ± 20 ± 20 µA ICC1‡§ Average read- or write-cycle current VDD = 3.6 V, Minimum cycle 1 920 1 600 1 440 mA ICC2 Average standby VIH = 2 V (LVTTL), After one memory cycle, RASx and CASx high 32 32 32 mA ICC2 standby current VIH = VDD – 0.2 V (LVCMOS), After one memory cycle, RASx and CASx high 16 16 16 mA ICC3‡§ Average refresh current (RASx-only refresh or CBR) VDD = 3.6 V, Minimum cycle, RASx cycling, CASx high (RASx-only refresh), RASx low after CASx low (CBR) 1 920 1 600 1 440 mA ICC4‡¶ Average EDO current VDD = 3.6 V, tHPC = MIN, RASx low, CASx cycling 1 760 1 440 1 280 mA † For conditions shown as MIN / MAX, use the appropriate value specified in the timing requirements. ‡ Measured with outputs open § Measured with a maximum of one address change while RASx = VIL ¶ Measured with a maximum of one address change during each EDO cycle, tHPC |
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