TMS626812

1048576 BY 8-BIT BY 2-BANK

SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY

SMOS687A –JULY 1996 – REVISED APRIL 1997

4

POST OFFICE BOX 1443

operation (continued)

COMMAND‡

STATE OF BANK(S)

CKE

(n – 1)

CKE

(n)

CS

(n)

RAS

(n)

CAS

(n)

W

(n)

MNEMONIC

Self-refresh entry

T = deac

B = deac

H

L

L

L

L

H

SLFR

Power-down entry on cycle (n+1)§

T = no access operation¶

B = no access operation¶

H

L

X

X

X

X

PDE

Self refresh exit

T = self refresh

L

H

L

H

H

H

—

Self-refresh exit

B = self refresh

L

H

H

X

X

X

—

Power-down exit#

T = power down

B = power down

L

H

X

X

X

X

—

CLK suspend on cycle (n+1)

T = access operation¶

B = access operation¶

H

L

X

X

X

X

HOLD

CLK suspend exit on cycle (n+1)

T = access operation¶

B = access operation¶

L

H

X

X

X

X

—

† For execution of these commands, A0 – A11 (n) and DQM (n) are don’t cares.

‡ All other unlisted commands are considered vendor-reserved commands or illegal commands.

§ On cycle n, the device executes the respective command (listed in Table 1). On cycle (n+1), the device enters power-down mode.

¶ A bank is no longer in an access operation one cycle after the last data-out cycle of a read operation, and two cycles after the last data-in cycle

of a write operation. Neither the PDE nor the HOLD command is allowed on the cycle immediately following the last data-in cycle of a write

operation.

# If setup time from CKE high to the next CLK high satisfies tCESP, the device executes the respective command (listed in Table 1). Otherwise,

either DESL or NOOP command must be applied before any other command.

Legend:

n

= CLK cycle number

L

= Logic low

H

= Logic high

X

= Don’t care, either logic low or logic high

T

= Bank T

B

= Bank B

deac = Deactivated