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XR16C2852IJ Datasheet(PDF) 4 Page - Exar Corporation |
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XR16C2852IJ Datasheet(HTML) 4 Page - Exar Corporation |
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4 / 42 page  áç áç áç áç 3.3V AND 5V DUART WITH 128-BYTE FIFO XR16C2852 REV. 2.0.0 4 MFB# 19 O Multi-Function Output ChannelB. This output pin can function as the OP2B#, BAUD- OUTB#, or RXRDYB# pin. One of these output signal functions can be selected by the user programmable bits 1-2 of the Alternate Function Register (AFR). These sig- nal functions are described as follows: 1) OP2B# - When OP2B# (active low) is selected, the MF# pin is a logic 0 when MCR bit-3 is set to a logic 1 (see MCR bit-3). MCR bit-3 defaults to a logic 1 condition after a reset or power-up. 2) BAUDOUTB# - When BAUDOUTB# function is selected, the 16X Baud rate clock output is available at this pin. 3) RXRDYB# - RXRDYB# (active low) is intended for monitoring DMA data transfers. See Table 2 on page 7 for more details. TXA TXB 38 26 O UART channel A or B Transmit Data or infrared encoder data. Standard transmit and receive interface is enabled when MCR[6] = 0. In this mode, the TX signal will be a logic 1 during reset or idle (no data). Infrared IrDA transmit and receive interface is enabled when MCR[6] = 1. In the Infrared mode, the inactive state (no data) for the Infrared encoder/decoder interface is a logic 0. If it is not used, leave it unconnected. RXA RXB 39 25 I UART channel A or B Receive Data or infrared receive data. Normal receive data input must idle at logic 1 condition. The infrared receiver pulses typically idles at logic 0 but can be inverted by software control prior going in to the decoder, see MCR[6] and FCTR[2]. If this pin is not used, tie to VCC or pull it high via a 100k ohm resistor. RTSA# RTSB# 36 23 O UART channel A or B Request-to-Send (active low) or general purpose output. This output must be asserted prior to using auto RTS flow control, see EFR[6], MCR[1], FCTR[1:0], EMSR[5:4] and IER[6]. CTSA# CTSB# 40 28 I UART channel A or B Clear-to-Send (active low) or general purpose input. It can be used for auto CTS flow control, see EFR[7], and IER[7]. This input should be con- nected to VCC when not used. DTRA# DTRB# 37 27 O UART channel A or B Data-Terminal-Ready (active low) or general purpose output. If this pin is not used, leave it unconnected. DSRA# DSRB# 41 29 I UART channel A or B Data-Set-Ready (active low) or general purpose input. This input should be connected to VCC when not used. This input has no effect on the UART. CDA# CDB# 42 30 I UART channel A or B Carrier-Detect (active low) or general purpose input. This input should be connected to VCC when not used. This input has no effect on the UART. RIA# RIB# 43 31 I UART channel A or B Ring-Indicator (active low) or general purpose input. This input should be connected to VCC when not used. This input has no effect on the UART. ANCILLARY SIGNALS XTAL1 11 I Crystal or external clock input. XTAL2 13 O Crystal or buffered clock output. RESET 21 I Reset (active high) - A longer than 40 ns logic 1 pulse on this pin will reset the internal registers and all outputs. The UART transmitter output will be held at logic 1, the receiver input will be ignored and outputs are reset during reset period (see External Reset Conditions). VCC 44, 33 Pwr 3.3V or 5V power supply. Please note that the inputs are not 5V tolerant when oper- ating at 3.3V. NAME 44-PLCC PIN # TYPE DESCRIPTION |
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